2020-06-01 |
Luke Kenneth... | remove unneeded code |
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2020-05-31 |
Luke Kenneth... | bit-test on the function-unit value being tested |
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2020-05-31 |
Luke Kenneth... | update isatables to cmpb not modifying CR0 |
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2020-05-31 |
Luke Kenneth... | add logical compunit test |
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2020-05-31 |
Luke Kenneth... | comment inputs and outputs from ALU unit test |
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2020-05-31 |
Luke Kenneth... | imports - use of globals. baaaad |
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2020-05-31 |
Luke Kenneth... | remove unneeded code and inputs. convert to "naming... |
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2020-05-31 |
Luke Kenneth... | split out common code from test_alu_compunit.py |
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2020-05-31 |
Luke Kenneth... | add comments for MultiCompUnit parallel test |
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2020-05-31 |
Luke Kenneth... | de-hard-code-ify getting results from MultiCompUnit |
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2020-05-31 |
Luke Kenneth... | remove unneeded imports |
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2020-05-31 |
Luke Kenneth... | split out compalu unit tests to separate module (gettin... |
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2020-05-31 |
Luke Kenneth... | HA! found a bug in MultiCompUnit handling of write... |
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2020-05-31 |
Luke Kenneth... | clarify |
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2020-05-31 |
Luke Kenneth... | OP_CMPEQB also requesting change of output reg (stop... |
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2020-05-31 |
Luke Kenneth... | OP_CMP is requesting a change of the output register... |
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2020-05-31 |
Luke Kenneth... | still investigating |
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2020-05-31 |
Luke Kenneth... | start with zero, try not to compare against 9 bytes... |
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2020-05-31 |
Luke Kenneth... | more debug statements |
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2020-05-31 |
Luke Kenneth... | add in more CR debug statements |
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2020-05-31 |
Luke Kenneth... | copy in cr0.data into cr0 temp, not whole of cr0 (inclu... |
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2020-05-31 |
Luke Kenneth... | remove commented-out vars from ALU input record |
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2020-05-31 |
Luke Kenneth... | write cr0 when op.write_cr.ok is set |
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2020-05-31 |
Luke Kenneth... | add write_cr to ALU record subset |
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2020-05-31 |
Luke Kenneth... | comment out xer ov/so for now |
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2020-05-30 |
Luke Kenneth... | get carry from cr write_cr |
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2020-05-30 |
Luke Kenneth... | select CR0 write out only when RC=1 |
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2020-05-30 |
Luke Kenneth... | set CR0 output when OP_CMP or OP_CMPEQB need it |
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2020-05-30 |
Luke Kenneth... | add in use of "Settle" |
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2020-05-30 |
Luke Kenneth... | add in write-mask into MultiCompUnit and MCU-ALU unit... |
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2020-05-30 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-05-30 |
Tobias Platen | unit test for DataMerger |
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2020-05-30 |
Luke Kenneth... | create read-mask for ALU CompUnit: switches off optiona... |
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2020-05-30 |
Luke Kenneth... | create a write-mask, anything with an "ok" in the Recor... |
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2020-05-30 |
Luke Kenneth... | allow MultiCompUnit outputs to be Records, to capture... |
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2020-05-30 |
Luke Kenneth... | add read-mask to MultiCompUnit |
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2020-05-30 |
Luke Kenneth... | code-shuffle / comments |
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2020-05-30 |
Luke Kenneth... | mess - but a functional mess. ALU-MultiCompUnit semi... |
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2020-05-30 |
Luke Kenneth... | grab other results from ALU pipeline in compunit test |
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2020-05-30 |
Luke Kenneth... | order of XER so/ca wrong way round from regspec |
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2020-05-30 |
Luke Kenneth... | still experimenting with ALU-CompUnit interaction |
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2020-05-29 |
Luke Kenneth... | interesting. use of Settle() works, showing that Regfi... |
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2020-05-29 |
Luke Kenneth... | module comments for popcount |
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2020-05-29 |
Luke Kenneth... | comments on popcount |
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2020-05-29 |
Luke Kenneth... | trigger ALU ready when operands ready |
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2020-05-29 |
Tobias Platen | fixes for DataMerger |
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2020-05-29 |
Luke Kenneth... | trigger read ALU ready/valid from latch as well |
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2020-05-29 |
Luke Kenneth... | use a latch to communicate read/valid output from ALU |
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2020-05-29 |
Tobias Platen | DataMerger: rename addr_match_i to addr_array_i |
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2020-05-29 |
Tobias Platen | fixed 'return m is missing' |
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2020-05-29 |
Tobias Platen | whitespace fixes |
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2020-05-29 |
Luke Kenneth... | latch all output on ALU output valid |
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2020-05-29 |
Luke Kenneth... | create read-done pulse |
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2020-05-29 |
Luke Kenneth... | write-release moves out of "ALU valid" due to using... |
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2020-05-29 |
Luke Kenneth... | signal start of request from when ALU triggers result... |
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2020-05-29 |
Luke Kenneth... | create rising pulse from ALU valid |
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2020-05-29 |
Luke Kenneth... | names of attributes needs to be dest_o not dest_i |
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2020-05-29 |
Luke Kenneth... | rename output signals in Test ALU |
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2020-05-29 |
Cesar Strauss | Allow immediate assertion of go in the same cycle as rel |
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2020-05-29 |
Cesar Strauss | Correct typo |
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2020-05-29 |
Cesar Strauss | Send a one-clock "go" pulse after a configurable number... |
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2020-05-28 |
Luke Kenneth... | messing about with proof_regfile.py |
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2020-05-28 |
Luke Kenneth... | move simple_popcount out of class (does not use any... |
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2020-05-28 |
colepoirier | Added Initial() synchronous check with draft truth |
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2020-05-28 |
Luke Kenneth... | extra check on rd.req in test_alu_compunit |
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2020-05-28 |
Tobias Platen | indention |
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2020-05-28 |
Michael Nolan | Add proof for OP_SETB |
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2020-05-28 |
Michael Nolan | Update to latest wiki version |
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2020-05-28 |
Michael Nolan | Add OP_SETB |
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2020-05-28 |
Michael Nolan | Fix test_isel to properly examine registers |
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2020-05-28 |
Tobias Platen | unittest for DataMerger |
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2020-05-28 |
Tobias Platen | more fixes for DataMerger |
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2020-05-28 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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2020-05-28 |
Tobias Platen | fixes for l0_cache.py |
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2020-05-28 |
Luke Kenneth... | debug-print rd/wr rel in test_alu_compunit |
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2020-05-28 |
Luke Kenneth... | add quick test of 3-operand DummyALU in MultiCompALU |
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2020-05-28 |
Luke Kenneth... | add 3rd parameter to DummyALU |
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2020-05-28 |
Luke Kenneth... | debugging test_alu_compunit.py |
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2020-05-28 |
Luke Kenneth... | start on a compunit ALU test |
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2020-05-28 |
Luke Kenneth... | update comment |
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2020-05-28 |
Luke Kenneth... | remove trick of not setting SO |
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2020-05-28 |
Cesar Strauss | Check that rd rises after issue_i, unless it's immediate |
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2020-05-28 |
Luke Kenneth... | hmm.... |
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2020-05-28 |
colepoirier | Add sync Assert for _wrports 'wen' signal in proof_regf... |
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2020-05-28 |
Cesar Strauss | Store and present parameters together with issue_i |
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2020-05-27 |
Luke Kenneth... | do not use range(0, x) - just range(x) |
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2020-05-27 |
Luke Kenneth... | remove write-block on register zero |
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2020-05-27 |
Luke Kenneth... | code-morph, add TODO on OP_RFID, OP_SC, OP_ADDPCIS |
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2020-05-27 |
colepoirier | Derive proof_regfile Driver from regfile.Register(... |
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2020-05-27 |
colepoirier | Fix indentation of regfile/formal/proof_regfile.py |
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2020-05-27 |
colepoirier | First commit of proof of regfile, not working yet |
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2020-05-27 |
Luke Kenneth... | add LD/ST pipe_data |
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2020-05-27 |
Luke Kenneth... | LogicalOutputData does not need XER.so |
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2020-05-27 |
Luke Kenneth... | comments |
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2020-05-27 |
Luke Kenneth... | remove XER.ca from logical Input Data - not needed |
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2020-05-27 |
Luke Kenneth... | cleanup logical main proof |
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2020-05-27 |
Luke Kenneth... | check cr0, ov and ca ok signals in ALU main_stage proof |
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2020-05-27 |
Luke Kenneth... | add carry-out, overflow and cr0 ok setting in ALU main_... |
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2020-05-27 |
Luke Kenneth... | add SRR0 to TrapInputData |
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2020-05-27 |
Luke Kenneth... | add links to bugreports into ALu formal proof as well |
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next |