2021-03-07 |
Tobias Platen | RADIX: implement memassign and call |
tree | commitdiff |
2021-03-05 |
Tobias Platen | unit test: pass bool mmu |
tree | commitdiff |
2021-03-05 |
Luke Kenneth Casso... | add comments and more stub functions |
tree | commitdiff |
2021-03-05 |
Luke Kenneth Casso... | add segment_check function, plus quick test. |
tree | commitdiff |
2021-03-05 |
Luke Kenneth Casso... | add decode_prte function to RADIX |
tree | commitdiff |
2021-03-05 |
Luke Kenneth Casso... | add trivial LD/ST redirectors into RADIX ISACaller |
tree | commitdiff |
2021-03-04 |
Luke Kenneth Casso... | whitespace |
tree | commitdiff |
2021-03-04 |
Tobias Platen | update test_caller_radix.py |
tree | commitdiff |
2021-03-04 |
Tobias Platen | ISACaller: add option mmu |
tree | commitdiff |
2021-03-04 |
Luke Kenneth Casso... | add comments from gem5-experimental mmu |
tree | commitdiff |
2021-03-04 |
Luke Kenneth Casso... | add cached pgtbl0/3 |
tree | commitdiff |
2021-03-04 |
Luke Kenneth Casso... | add two functions for checking permissions, to be based... |
tree | commitdiff |
2021-03-03 |
Tobias Platen | add RADIX skeleton and unit test |
tree | commitdiff |
2021-03-03 |
Luke Kenneth Casso... | add debug strings |
tree | commitdiff |
2021-03-03 |
Luke Kenneth Casso... | remove singleton pattern |
tree | commitdiff |
2021-02-27 |
Luke Kenneth Casso... | use PowerDecoder2.no_out_vec instead of manual vector... |
tree | commitdiff |
2021-02-27 |
Luke Kenneth Casso... | add corresponding VL=0 unit test as from 161b7d67b... |
tree | commitdiff |
2021-02-21 |
Luke Kenneth Casso... | comments in SVP64RMFields |
tree | commitdiff |
2021-02-21 |
Cesar Strauss | Use symbolic values as field sizes |
tree | commitdiff |
2021-02-21 |
Cesar Strauss | Replace all hardcoded shifts into RM by usage of SVP64R... |
tree | commitdiff |
2021-02-21 |
Luke Kenneth Casso... | create SVP64CROffs consts for when SVP64 Vector-of... |
tree | commitdiff |
2021-02-20 |
Luke Kenneth Casso... | comments on sv.add. Rc=1 unit test |
tree | commitdiff |
2021-02-20 |
Luke Kenneth Casso... | add in Vectorised CRs when Rc=1 into ISACaller |
tree | commitdiff |
2021-02-20 |
Luke Kenneth Casso... | add some debug checking to get_pdecode_cr_out |
tree | commitdiff |
2021-02-20 |
Luke Kenneth Casso... | add more debug output to get_pdecode_cr_out |
tree | commitdiff |
2021-02-20 |
Cesar Strauss | Assemble the SV64 prefix from its subfields using SVP64... |
tree | commitdiff |
2021-02-20 |
Luke Kenneth Casso... | start on CRs in SVP64 mode |
tree | commitdiff |
2021-02-17 |
Luke Kenneth Casso... | fix reg read/write in ISACaller, PowerDecoder2 handles... |
tree | commitdiff |
2021-02-16 |
Cesar Strauss | Fix MSB0 issues for SVP64 |
tree | commitdiff |
2021-02-16 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2021-02-16 |
Luke Kenneth Casso... | ordering wrong on svstate in ISACaller |
tree | commitdiff |
2021-02-15 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2021-02-13 |
Luke Kenneth Casso... | update svp64 unit test comments |
tree | commitdiff |
2021-02-12 |
Luke Kenneth Casso... | add skip of instruction if SVSTATE.VL=0 in ISACaller |
tree | commitdiff |
2021-02-12 |
Luke Kenneth Casso... | validate all registers to make sure no damage occurs... |
tree | commitdiff |
2021-02-12 |
Luke Kenneth Casso... | add srcstep and correct PC-advancing during Sub-PC... |
tree | commitdiff |
2021-02-12 |
Luke Kenneth Casso... | comments |
tree | commitdiff |
2021-02-12 |
Luke Kenneth Casso... | add in SVSTATE.srcstep update, loop from 0 to VL-1 |
tree | commitdiff |
2021-02-12 |
Luke Kenneth Casso... | allow PC to update by 8 in SVP64 mode |
tree | commitdiff |
2021-02-12 |
Luke Kenneth Casso... | fix setting of SVSTATE.VL and MVL |
tree | commitdiff |
2021-02-12 |
Luke Kenneth Casso... | add in SVSTATE to ISACaller, not used, just passed in |
tree | commitdiff |
2021-02-10 |
Luke Kenneth Casso... | add svp64 reg decode detection to ISACaller output |
tree | commitdiff |
2021-02-10 |
Luke Kenneth Casso... | starting to add SVP64 register EXTRA-read and isvec... |
tree | commitdiff |
2021-02-10 |
Luke Kenneth Casso... | comment update |
tree | commitdiff |
2021-02-01 |
Luke Kenneth Casso... | ISACaller, in svp64 mode, read the next 32 bits when... |
tree | commitdiff |
2021-02-01 |
Luke Kenneth Casso... | sort out SelectableInt bit-ordering for identifying... |
tree | commitdiff |
2021-01-31 |
Luke Kenneth Casso... | start an ISACaller SVP64 unit test |
tree | commitdiff |
2021-01-31 |
Luke Kenneth Casso... | test SVP64 major opcode, start checking if it is EXT001... |
tree | commitdiff |
2021-01-31 |
Luke Kenneth Casso... | adjusting ISACaller unit test to use ISACaller.setup_one() |
tree | commitdiff |
2021-01-31 |
Luke Kenneth Casso... | fix ISACaller unit test |
tree | commitdiff |
2021-01-31 |
Tobias Platen | fix two syntax errors in src/soc/decoder/isa/caller.py |
tree | commitdiff |
2021-01-31 |
Luke Kenneth Casso... | SVP64 Remap Fields structures for ISACaller |
tree | commitdiff |
2021-01-31 |
Luke Kenneth Casso... | remove sv_rm from PowerDecoder register decoders |
tree | commitdiff |
2021-01-31 |
Luke Kenneth Casso... | add SVSTATE SPR sub-field accessor class to ISACaller |
tree | commitdiff |
2020-10-09 |
Luke Kenneth Casso... | drop in "undefined" function into ISAcaller namespace |
tree | commitdiff |
2020-10-05 |
Jacob Lifshay | simplify create_args |
tree | commitdiff |
2020-10-05 |
Jacob Lifshay | Sort returned variables to make sure `overflow` is... |
tree | commitdiff |
2020-10-05 |
Jacob Lifshay | format caller.py |
tree | commitdiff |
2020-09-07 |
Luke Kenneth Casso... | whoops spelling mistake outOut_carry not outPut_carry |
tree | commitdiff |
2020-09-07 |
Luke Kenneth Casso... | convert mul test to use Power Decode subset |
tree | commitdiff |
2020-09-07 |
Luke Kenneth Casso... | convert CR to PowerDecodeSubset format |
tree | commitdiff |
2020-09-07 |
Luke Kenneth Casso... | bit of a big reorg of data structures |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | add bc ctr regression test when CTR=0 and CTR=1 |
tree | commitdiff |
2020-09-02 |
Luke Kenneth Casso... | series of extensive modifications to fix long-standing... |
tree | commitdiff |
2020-08-27 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | really bad hack to fix simulator bug in carry handling |
tree | commitdiff |
2020-08-24 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-22 |
Luke Kenneth Casso... | rename invert_a to invert_in because logical inverts RB |
tree | commitdiff |
2020-08-17 |
Luke Kenneth Casso... | turn SelectableInt less/greater into signed versions. |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | bad hack to get HSRR0/1 to be "same" as SRR0/1 |
tree | commitdiff |
2020-08-04 |
Luke Kenneth Casso... | tracked down byte-reversal in LDST ISACaller and LDSTCo... |
tree | commitdiff |
2020-08-04 |
Luke Kenneth Casso... | whitespace after autopep8 messed up |
tree | commitdiff |
2020-08-04 |
Luke Kenneth Casso... | msr and pc moved to "state" in PowerDecode2 |
tree | commitdiff |
2020-08-01 |
Luke Kenneth Casso... | add quick test of litex bios IMM64 macro |
tree | commitdiff |
2020-07-25 |
Luke Kenneth Casso... | hilarious. only just caught a bug where overflow was... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | annoying, yet more typos |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | annoying, typo |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | better debug assert log message |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | restore modification to caller.py from reversion of... |
tree | commitdiff |
2020-07-24 |
Luke Kenneth Casso... | Revert "working on div's test_pipe_caller" |
tree | commitdiff |
2020-07-24 |
Jacob Lifshay | working on div's test_pipe_caller |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | Merge remote-tracking branch 'origin/master' |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | format code |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | set additional MSR bits according to v3.0B spec when... |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | use (new) MSRb and PIb which has auto-bigendian numbers |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | convert branch pipeline to use msr/cia as immediates |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | set ISACaller.msr rather than namespace[MSR] |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | add msr exception bits setting function in hardware |
tree | commitdiff |
2020-07-17 |
Jacob Lifshay | add missing fixedldstcache.py to .gitignore |
tree | commitdiff |
2020-07-16 |
Luke Kenneth Casso... | sigh, bug in sprset.patch |
tree | commitdiff |
2020-07-16 |
Luke Kenneth Casso... | get trap compunit test working, adding bigendian and msr |
tree | commitdiff |
2020-07-15 |
Luke Kenneth Casso... | whoops forgot to update PC after trap in ISACaller |
tree | commitdiff |
2020-07-14 |
Luke Kenneth Casso... | attempting to access self.msr directly |
tree | commitdiff |
2020-07-14 |
Luke Kenneth Casso... | add priv instruction checking to ISACaller simulator |
tree | commitdiff |
2020-07-13 |
Luke Kenneth Casso... | remove unneeded spec patching |
tree | commitdiff |
2020-07-13 |
Luke Kenneth Casso... | enable extswsli tests, fix spec-patching |
tree | commitdiff |
2020-07-12 |
Luke Kenneth Casso... | rename InternalOp to MicrOp |
tree | commitdiff |
2020-07-11 |
Luke Kenneth Casso... | sorting out bigendian/littleendian including in qemu |
tree | commitdiff |
2020-07-11 |
Luke Kenneth Casso... | special test for mul hw to cope with ignoring OE flag |
tree | commitdiff |
2020-07-10 |
Luke Kenneth Casso... | add a DIVS function as separate and discrete from floor_div |
tree | commitdiff |
next |