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include SVSTATE in namespace, passing to ISACaller
[soc.git]
/
src
/
soc
/
decoder
/
2021-03-13
Luke Kenneth Casso...
include SVSTATE in namespace, passing to ISACaller
tree
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commitdiff
2021-03-12
Jacob Lifshay
add setvl to decoder
tree
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commitdiff
2021-03-12
Jacob Lifshay
autoformat code
tree
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commitdiff
2021-03-12
Luke Kenneth Casso...
add OP_SETVL to MicrOp in power_enums.py
tree
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commitdiff
2021-03-12
Luke Kenneth Casso...
add ability to set and distinguish RT=0 (RT_OR_ZERO...
tree
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commitdiff
2021-03-12
Luke Kenneth Casso...
add more sophisticated checking of whether SVP64 loop...
tree
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commitdiff
2021-03-12
Luke Kenneth Casso...
**FOR NOW** LD/ST relies on detection of twin-predicati...
tree
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commitdiff
2021-03-12
Jacob Lifshay
add forgotten PO (primary opcode) field to DecodeFields
tree
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commitdiff
2021-03-11
Luke Kenneth Casso...
add detection of whether *full* 7-bit of RA is zero...
tree
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commitdiff
2021-03-11
Luke Kenneth Casso...
add in SVP64 LD/ST basic test for ISACaller
tree
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commitdiff
2021-03-11
Luke Kenneth Casso...
whoops sort out when svstate not active in ISACaller
tree
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commitdiff
2021-03-11
Luke Kenneth Casso...
whoops PIDR is defined as 32-bits in SPRs.csv (and...
tree
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commitdiff
2021-03-11
Tobias Platen
fix runtime error
tree
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commitdiff
2021-03-10
Tobias Platen
radix: reading first page table entry
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commitdiff
2021-03-10
Luke Kenneth Casso...
add walk_tree arguments it needs
tree
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commitdiff
2021-03-09
Luke Kenneth Casso...
fix address must convert to SelectableInt
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commitdiff
2021-03-09
Luke Kenneth Casso...
call decode_ptre on address to obtain shift, mbits...
tree
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commitdiff
2021-03-09
Tobias Platen
whitespace
tree
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commitdiff
2021-03-09
Tobias Platen
RADIX: call self._walk_tree in ld and st
tree
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commitdiff
2021-03-09
Luke Kenneth Casso...
debug radix mmu ISACaller
tree
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commitdiff
2021-03-09
Tobias Platen
comment out broken spr code
tree
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commitdiff
2021-03-09
Tobias Platen
_walk_tree: access sprs
tree
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commitdiff
2021-03-09
Luke Kenneth Casso...
create first check_perms RADIX ISACaller function
tree
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commitdiff
2021-03-09
Luke Kenneth Casso...
move Mem class out of ISACaller
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commitdiff
2021-03-09
Luke Kenneth Casso...
cleanup imports
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commitdiff
2021-03-09
Luke Kenneth Casso...
move ISACaller RADIX MMU class to separate module
tree
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commitdiff
2021-03-09
Luke Kenneth Casso...
add pgtable and pte calculation to RADIX ISACaller
tree
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commitdiff
2021-03-08
Luke Kenneth Casso...
start adding _get_prtable_addr
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commitdiff
2021-03-08
Luke Kenneth Casso...
actually make it possible to disable svp64 on commandli...
tree
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commitdiff
2021-03-08
Luke Kenneth Casso...
add option to cut out SVP64 from PowerDecoder2
tree
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commitdiff
2021-03-07
Cesar Strauss
Fix missing NIA update on ISACaller
tree
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commitdiff
2021-03-07
Tobias Platen
RADIX: read SPRs
tree
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commitdiff
2021-03-07
Tobias Platen
RADIX: implement memassign and call
tree
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commitdiff
2021-03-05
Tobias Platen
unit test: pass bool mmu
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commitdiff
2021-03-05
Luke Kenneth Casso...
add comments and more stub functions
tree
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commitdiff
2021-03-05
Luke Kenneth Casso...
add segment_check function, plus quick test.
tree
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commitdiff
2021-03-05
Luke Kenneth Casso...
add decode_prte function to RADIX
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commitdiff
2021-03-05
Luke Kenneth Casso...
add trivial LD/ST redirectors into RADIX ISACaller
tree
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commitdiff
2021-03-04
Luke Kenneth Casso...
whitespace
tree
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commitdiff
2021-03-04
Tobias Platen
update test_caller_radix.py
tree
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commitdiff
2021-03-04
Tobias Platen
ISACaller: add option mmu
tree
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commitdiff
2021-03-04
Luke Kenneth Casso...
whoops microwatt already allocates SPR 720
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commitdiff
2021-03-04
Luke Kenneth Casso...
add comments from gem5-experimental mmu
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commitdiff
2021-03-04
Luke Kenneth Casso...
add cached pgtbl0/3
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commitdiff
2021-03-04
Luke Kenneth Casso...
add two functions for checking permissions, to be based...
tree
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commitdiff
2021-03-03
Tobias Platen
add RADIX skeleton and unit test
tree
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commitdiff
2021-03-03
Luke Kenneth Casso...
add debug strings
tree
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commitdiff
2021-03-03
Luke Kenneth Casso...
remove singleton pattern
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commitdiff
2021-03-02
Luke Kenneth Casso...
operating correctly, not directing MMU SPRs to SPR...
tree
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commitdiff
2021-03-01
Luke Kenneth Casso...
Revert "fix Bug 607 - unnecessary code added related...
tree
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commitdiff
2021-03-01
Luke Kenneth Casso...
move SVP64 RM decoder to separate module
tree
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commitdiff
2021-02-28
Luke Kenneth Casso...
start on SVP64 RM Mode decoder
tree
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commitdiff
2021-02-28
Luke Kenneth Casso...
more SVP64 enums
tree
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commitdiff
2021-02-28
Luke Kenneth Casso...
add SVP64 RM sub-field enums
tree
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commitdiff
2021-02-28
Luke Kenneth Casso...
move SVP64 Extra decoders to separate module
tree
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commitdiff
2021-02-28
Luke Kenneth Casso...
fix syntax error
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commitdiff
2021-02-28
Luke Kenneth Casso...
move SVP64PrefixDecoder to separate module
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commitdiff
2021-02-28
Luke Kenneth Casso...
add PowerDecoder.no_in_vec
tree
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commitdiff
2021-02-28
Luke Kenneth Casso...
add svp64_instrs to power_svp64
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commitdiff
2021-02-28
Tobias Platen
fix Bug 607 - unnecessary code added related to MMU...
tree
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commitdiff
2021-02-28
Tobias Platen
fix Bug 603 - use SPR names/numbers from sprs.csv
tree
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commitdiff
2021-02-27
Luke Kenneth Casso...
use PowerDecoder2.no_out_vec instead of manual vector...
tree
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commitdiff
2021-02-27
Luke Kenneth Casso...
add corresponding VL=0 unit test as from 161b7d67b...
tree
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commitdiff
2021-02-24
Luke Kenneth Casso...
add comments explaining split
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commitdiff
2021-02-24
Luke Kenneth Casso...
move DecodeCROut/In (at last) out of PowerDecoderSubset...
tree
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commitdiff
2021-02-24
Luke Kenneth Casso...
start making write_cr0 independent of DecodeCROut
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commitdiff
2021-02-22
Cesar Strauss
Fix typo when calculating PowerDecoder2.no_out_vec
tree
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commitdiff
2021-02-21
Luke Kenneth Casso...
add CR out vector detection to PowerDecoder2 no_out_vec
tree
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commitdiff
2021-02-21
Cesar Strauss
The new version of "sel" is smart enough to find a...
tree
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commitdiff
2021-02-21
Luke Kenneth Casso...
comments in SVP64RMFields
tree
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commitdiff
2021-02-21
Cesar Strauss
Use the new selection field function from nmutil
tree
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commitdiff
2021-02-21
Cesar Strauss
Use symbolic values as field sizes
tree
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commitdiff
2021-02-21
Cesar Strauss
Replace all hardcoded shifts into RM by usage of SVP64R...
tree
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commitdiff
2021-02-21
Luke Kenneth Casso...
create SVP64CROffs consts for when SVP64 Vector-of...
tree
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commitdiff
2021-02-20
Luke Kenneth Casso...
comments on sv.add. Rc=1 unit test
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commitdiff
2021-02-20
Luke Kenneth Casso...
add in Vectorised CRs when Rc=1 into ISACaller
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commitdiff
2021-02-20
Luke Kenneth Casso...
add CR1 to DecodeCRIn/Out
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commitdiff
2021-02-20
Luke Kenneth Casso...
add some debug checking to get_pdecode_cr_out
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commitdiff
2021-02-20
Luke Kenneth Casso...
add crossreference to bug #603
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commitdiff
2021-02-20
Luke Kenneth Casso...
add more debug output to get_pdecode_cr_out
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commitdiff
2021-02-20
Cesar Strauss
Assemble the SV64 prefix from its subfields using SVP64...
tree
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commitdiff
2021-02-20
Luke Kenneth Casso...
start on CRs in SVP64 mode
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commitdiff
2021-02-20
Cesar Strauss
Fix more MSB0 issues in comments
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commitdiff
2021-02-20
Cesar Strauss
Replace more hardcoded constants with symbolic field...
tree
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commitdiff
2021-02-20
Luke Kenneth Casso...
increment CRs based on srcstep, see what happens
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commitdiff
2021-02-17
Cesar Strauss
Use subfield bit selection to extract the RM SVP64...
tree
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commitdiff
2021-02-17
Cesar Strauss
Replace MSB-i by symbolic subfield indices and selectors
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commitdiff
2021-02-17
Luke Kenneth Casso...
fix reg read/write in ISACaller, PowerDecoder2 handles...
tree
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commitdiff
2021-02-16
Cesar Strauss
Fix MSB0 issues for SVP64
tree
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commitdiff
2021-02-16
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
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commitdiff
2021-02-16
Luke Kenneth Casso...
ordering wrong on svstate in ISACaller
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commitdiff
2021-02-16
Luke Kenneth Casso...
add indicator to PowerDecoder2 when no outputs are...
tree
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commitdiff
2021-02-15
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
tree
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commitdiff
2021-02-14
Cesar Strauss
Fix width of the "extra" input on the Extra decoder
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commitdiff
2021-02-14
Cesar Strauss
Fix conversion to MSB0
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commitdiff
2021-02-14
Luke Kenneth Casso...
add srcstep onto Vectorised GPRs in PowerDecoder2
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commitdiff
2021-02-13
Tobias Platen
OP_TLBIE must in be instr_is_priv
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commitdiff
2021-02-13
Tobias Platen
keep commits to under 80 chars
tree
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commitdiff
2021-02-13
Luke Kenneth Casso...
update svp64 unit test comments
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commitdiff
2021-02-13
Tobias Platen
forward microwatt mmu specific SPR: PID and PRTBL
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commitdiff
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