2020-08-25 |
Cole Poirier | dcache.py fix whitespace, fomatting, syntax |
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2020-08-25 |
Cole Poirier | dcache.py fix formatting |
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2020-08-25 |
Cole Poirier | dcache.py move Reservation RecordObject to top of file |
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2020-08-25 |
Cole Poirier | dcache.py move RegStage1 RecordObject to top of file |
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2020-08-25 |
Cole Poirier | dcache.py move MemAccessRequest RecordObject to top... |
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2020-08-25 |
Cole Poirier | dcache.py move Stage0 RecordObject to top of file |
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2020-08-24 |
Tobias Platen | TestCachedMemoryPortInterface cleanup |
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2020-08-24 |
Luke Kenneth Casso... | fix *another* ld-update-related timing / FSM issue |
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2020-08-24 |
Luke Kenneth Casso... | tidyup / shuffle after review |
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2020-08-24 |
Luke Kenneth Casso... | remove default parameter |
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2020-08-24 |
Luke Kenneth Casso... | "WAY" does not exist - range(NUM_WAYS) was intended |
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2020-08-24 |
Luke Kenneth Casso... | use WAY_BITS in appropriate locations |
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2020-08-24 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
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2020-08-24 |
Cole Poirier | dcache.py commit first full tranlation pass, about... |
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2020-08-23 |
Luke Kenneth Casso... | add algebraic ld tests lwax, lwaux |
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2020-08-23 |
Cesar Strauss | Allow an empty style, and passing default styles as... |
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2020-08-23 |
Cesar Strauss | Add comment node type |
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2020-08-23 |
Cesar Strauss | Add base and display styles |
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2020-08-23 |
Cesar Strauss | Apply style from node own name |
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2020-08-23 |
Cesar Strauss | Add color style |
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2020-08-23 |
Cesar Strauss | Collect styles from the tuple |
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2020-08-23 |
Cesar Strauss | Propagate the root style to all signals |
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2020-08-22 |
Luke Kenneth Casso... | rename invert_a to invert_in because logical inverts RB |
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2020-08-22 |
Cesar Strauss | Move comments to the docstring |
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2020-08-22 |
Cesar Strauss | Walk the DOM and emit the trace names |
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2020-08-22 |
Cesar Strauss | First draft of a mini-language to describe GTKWave... |
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2020-08-21 |
Luke Kenneth Casso... | remove extraneous comments |
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2020-08-21 |
Tobias Platen | typo fix in test_l0_cache_buffer2.py |
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2020-08-21 |
Cole Poirier | dcache.py fix asserts, use backslash and two strings... |
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2020-08-21 |
Cole Poirier | dcache.py replace functions that return signals with... |
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2020-08-21 |
Cole Poirier | wb_types fix typo |
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2020-08-21 |
Tobias Platen | connect TestCachedMemoryPortInterface to LDSTSplitter |
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2020-08-21 |
Luke Kenneth Casso... | comment formatting |
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2020-08-21 |
Luke Kenneth Casso... | remove default values |
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2020-08-21 |
Luke Kenneth Casso... | just range(the_constant) |
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2020-08-21 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
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2020-08-21 |
Cole Poirier | dcache.py commit today and yesterday's progress (sorry... |
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2020-08-20 |
Tobias Platen | start wiring TestCachedMemoryPortInterface |
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2020-08-20 |
Tobias Platen | testcase refactoring |
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2020-08-20 |
Tobias Platen | add new class TestCachedMemoryPortInterface |
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2020-08-19 |
Luke Kenneth Casso... | comments in dcache |
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2020-08-19 |
Luke Kenneth Casso... | more subtle interactions between wishbone bus when... |
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2020-08-18 |
Tobias Platen | add testcase for LDSTSplitter using PortInterface |
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2020-08-18 |
Luke Kenneth Casso... | add comment in dcache.py |
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2020-08-17 |
Cole Poirier | dcache.py commit today's progress on translating dcache... |
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2020-08-17 |
Cole Poirier | Create file experiment/wb_types.py to mirror microwatt... |
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2020-08-17 |
Luke Kenneth Casso... | move Mask to nmutil |
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2020-08-17 |
Luke Kenneth Casso... | use shift module in mmu. to be moved to nmutil |
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2020-08-16 |
Cole Poirier | mmu.py fix formatting 80 char limit |
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2020-08-16 |
Luke Kenneth Casso... | remove vhdl comments |
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2020-08-16 |
Luke Kenneth Casso... | use simple one-line mask-generation |
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2020-08-16 |
Luke Kenneth Casso... | fix LD/ST pimem issue with rising_edge detection |
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2020-08-16 |
Luke Kenneth Casso... | missing vars, spelling corrections |
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2020-08-16 |
Luke Kenneth Casso... | big reorg, shuffle code to functions, makes the FSM... |
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2020-08-16 |
Luke Kenneth Casso... | spelling error, move perm_ok to local |
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2020-08-16 |
Luke Kenneth Casso... | more comment removal |
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2020-08-16 |
Luke Kenneth Casso... | more remove comments |
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2020-08-16 |
Luke Kenneth Casso... | removing more comments, tidyup |
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2020-08-16 |
Luke Kenneth Casso... | restore incorrect removal of zero-Cat at LHS (should... |
tree | commitdiff |
2020-08-16 |
Luke Kenneth Casso... | continue tidyup, comment removal/review. use byte_reve... |
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2020-08-16 |
Luke Kenneth Casso... | fix batch of syntax errors found by running mmu.py |
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2020-08-16 |
Luke Kenneth Casso... | begin tidyup, removing comments after line-by-line... |
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2020-08-15 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
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2020-08-15 |
Cole Poirier | mmu.py fix Cat() semantics fixes https://bugs.libre... |
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2020-08-15 |
Cole Poirier | mmu.py fixes https://bugs.libre-soc.org/show_bug.cgi... |
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2020-08-15 |
Cole Poirier | mmu.py fixes https://bugs.libre-soc.org/show_bug.cgi... |
tree | commitdiff |
2020-08-15 |
Cole Poirier | mmu.py fixes https://bugs.libre-soc.org/show_bug.cgi... |
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2020-08-15 |
Luke Kenneth Casso... | clear compalu data latch always on issue |
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2020-08-15 |
Cesar Strauss | Demonstrates string traces |
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2020-08-15 |
Cesar Strauss | Demonstrates adding extra debug signals traces to the... |
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2020-08-15 |
Cesar Strauss | Demonstrates creating stylish GTKWave "save" files... |
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2020-08-14 |
Luke Kenneth Casso... | remove latchregister, use sync to capture compunit... |
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2020-08-14 |
Luke Kenneth Casso... | sync on alu results in compalu |
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2020-08-13 |
Luke Kenneth Casso... | code-shuffle |
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2020-08-13 |
Luke Kenneth Casso... | remove use of latchregigister, replace with sync on... |
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2020-08-13 |
Cole Poirier | dcache.py add initial imports |
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2020-08-13 |
Cole Poirier | mem_types.py add more types from common.vhdl |
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2020-08-13 |
Cole Poirier | move memory related types from mmu.py into new file... |
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2020-08-13 |
Luke Kenneth Casso... | sync on reset in compalu |
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2020-08-13 |
Luke Kenneth Casso... | sync on port interface address in ld/st compunit, and... |
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2020-08-13 |
Luke Kenneth Casso... | another sync to cut latency |
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2020-08-13 |
Cole Poirier | Initial commit of translation of microwatt dcache.vhdl... |
tree | commitdiff |
2020-08-13 |
Luke Kenneth Casso... | remove latchregister, sync src oper_i into MultiCompUnit |
tree | commitdiff |
2020-08-13 |
Luke Kenneth Casso... | minor tidyup on alu compunit: |
tree | commitdiff |
2020-08-13 |
Luke Kenneth Casso... | plenty of time to wait for operand, so use "sync" in... |
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2020-08-12 |
Cole Poirier | mmu.py add skeleton sim and test functions from regfile... |
tree | commitdiff |
2020-08-12 |
Cole Poirier | Delete unnecessary mmu dir, move mmu.py out of mmu... |
tree | commitdiff |
2020-08-12 |
Cole Poirier | Revert "Remove mmu dir and associated mmu/test/ dir... |
tree | commitdiff |
2020-08-12 |
Cole Poirier | Remove mmu dir and associated mmu/test/ dir |
tree | commitdiff |
2020-08-12 |
Cole Poirier | Remove rst signals, fix len of hex Consts, fix variable... |
tree | commitdiff |
2020-08-12 |
Cole Poirier | Create dir experiment/mmu then mmu/test with skeleton... |
tree | commitdiff |
2020-08-12 |
Cole Poirier | mmu.py add RecordObject classes from common.vhdl input... |
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2020-08-12 |
Cole Poirier | mmu.py remove TODOs for vhdl (others => '0') as they... |
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2020-08-12 |
Cole Poirier | mmu.py fix or(block of logic) to be (block of logic... |
tree | commitdiff |
2020-08-12 |
Cole Poirier | mmu.py fix length of hex const https://bugs.libre-soc... |
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2020-08-12 |
Cole Poirier | mmu.py remove class AddrShifter |
tree | commitdiff |
2020-08-12 |
Cole Poirier | Fix typo in mmu.py |
tree | commitdiff |
2020-08-11 |
Cole Poirier | mmu.py fix formatting, use Cat() where '&' in mmu.vhdl |
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2020-08-11 |
Tobias Platen | initial version of L0CacheBuffer2 |
tree | commitdiff |
2020-08-10 |
Cole Poirier | Fix typo in mmu.py |
tree | commitdiff |
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