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yep disable OE for MULH64/32 and EXTS and CNTZ
[soc.git] / src / soc / experiment /
2020-08-28 Cole Poirierdcache.py add first attempt at translation of dcache_tb... tree | commitdiff
2020-08-27 Cole Poirierdcache.py add skeleton sim and test adapted from mmu... tree | commitdiff
2020-08-27 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-27 Cole Poirierdcache.py implement the remaining vhdl generate stateme... tree | commitdiff
2020-08-26 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-26 Cole Poirierdcache.py replace subtypes/types/constant aliases with... tree | commitdiff
2020-08-25 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-25 Cole Poirierdcache.py rearrange, transform classes into functions... tree | commitdiff
2020-08-25 Cole Poirierdcache.py fix whitespace, fomatting, syntax tree | commitdiff
2020-08-25 Cole Poirierdcache.py fix formatting tree | commitdiff
2020-08-25 Cole Poirierdcache.py move Reservation RecordObject to top of file tree | commitdiff
2020-08-25 Cole Poirierdcache.py move RegStage1 RecordObject to top of file tree | commitdiff
2020-08-25 Cole Poirierdcache.py move MemAccessRequest RecordObject to top... tree | commitdiff
2020-08-25 Cole Poirierdcache.py move Stage0 RecordObject to top of file tree | commitdiff
2020-08-24 Tobias PlatenTestCachedMemoryPortInterface cleanup tree | commitdiff
2020-08-24 Luke Kenneth Casso... fix *another* ld-update-related timing / FSM issue tree | commitdiff
2020-08-24 Luke Kenneth Casso... tidyup / shuffle after review tree | commitdiff
2020-08-24 Luke Kenneth Casso... remove default parameter tree | commitdiff
2020-08-24 Luke Kenneth Casso... "WAY" does not exist - range(NUM_WAYS) was intended tree | commitdiff
2020-08-24 Luke Kenneth Casso... use WAY_BITS in appropriate locations tree | commitdiff
2020-08-24 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-24 Cole Poirierdcache.py commit first full tranlation pass, about... tree | commitdiff
2020-08-23 Luke Kenneth Casso... add algebraic ld tests lwax, lwaux tree | commitdiff
2020-08-23 Cesar StraussAllow an empty style, and passing default styles as... tree | commitdiff
2020-08-23 Cesar StraussAdd comment node type tree | commitdiff
2020-08-23 Cesar StraussAdd base and display styles tree | commitdiff
2020-08-23 Cesar StraussApply style from node own name tree | commitdiff
2020-08-23 Cesar StraussAdd color style tree | commitdiff
2020-08-23 Cesar StraussCollect styles from the tuple tree | commitdiff
2020-08-23 Cesar StraussPropagate the root style to all signals tree | commitdiff
2020-08-22 Luke Kenneth Casso... rename invert_a to invert_in because logical inverts RB tree | commitdiff
2020-08-22 Cesar StraussMove comments to the docstring tree | commitdiff
2020-08-22 Cesar StraussWalk the DOM and emit the trace names tree | commitdiff
2020-08-22 Cesar StraussFirst draft of a mini-language to describe GTKWave... tree | commitdiff
2020-08-21 Luke Kenneth Casso... remove extraneous comments tree | commitdiff
2020-08-21 Tobias Platentypo fix in test_l0_cache_buffer2.py tree | commitdiff
2020-08-21 Cole Poirierdcache.py fix asserts, use backslash and two strings... tree | commitdiff
2020-08-21 Cole Poirierdcache.py replace functions that return signals with... tree | commitdiff
2020-08-21 Cole Poirierwb_types fix typo tree | commitdiff
2020-08-21 Tobias Platenconnect TestCachedMemoryPortInterface to LDSTSplitter tree | commitdiff
2020-08-21 Luke Kenneth Casso... comment formatting tree | commitdiff
2020-08-21 Luke Kenneth Casso... remove default values tree | commitdiff
2020-08-21 Luke Kenneth Casso... just range(the_constant) tree | commitdiff
2020-08-21 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-21 Cole Poirierdcache.py commit today and yesterday's progress (sorry... tree | commitdiff
2020-08-20 Tobias Platenstart wiring TestCachedMemoryPortInterface tree | commitdiff
2020-08-20 Tobias Platentestcase refactoring tree | commitdiff
2020-08-20 Tobias Platenadd new class TestCachedMemoryPortInterface tree | commitdiff
2020-08-19 Luke Kenneth Casso... comments in dcache tree | commitdiff
2020-08-19 Luke Kenneth Casso... more subtle interactions between wishbone bus when... tree | commitdiff
2020-08-18 Tobias Platenadd testcase for LDSTSplitter using PortInterface tree | commitdiff
2020-08-18 Luke Kenneth Casso... add comment in dcache.py tree | commitdiff
2020-08-17 Cole Poirierdcache.py commit today's progress on translating dcache... tree | commitdiff
2020-08-17 Cole PoirierCreate file experiment/wb_types.py to mirror microwatt... tree | commitdiff
2020-08-17 Luke Kenneth Casso... move Mask to nmutil tree | commitdiff
2020-08-17 Luke Kenneth Casso... use shift module in mmu. to be moved to nmutil tree | commitdiff
2020-08-16 Cole Poiriermmu.py fix formatting 80 char limit tree | commitdiff
2020-08-16 Luke Kenneth Casso... remove vhdl comments tree | commitdiff
2020-08-16 Luke Kenneth Casso... use simple one-line mask-generation tree | commitdiff
2020-08-16 Luke Kenneth Casso... fix LD/ST pimem issue with rising_edge detection tree | commitdiff
2020-08-16 Luke Kenneth Casso... missing vars, spelling corrections tree | commitdiff
2020-08-16 Luke Kenneth Casso... big reorg, shuffle code to functions, makes the FSM... tree | commitdiff
2020-08-16 Luke Kenneth Casso... spelling error, move perm_ok to local tree | commitdiff
2020-08-16 Luke Kenneth Casso... more comment removal tree | commitdiff
2020-08-16 Luke Kenneth Casso... more remove comments tree | commitdiff
2020-08-16 Luke Kenneth Casso... removing more comments, tidyup tree | commitdiff
2020-08-16 Luke Kenneth Casso... restore incorrect removal of zero-Cat at LHS (should... tree | commitdiff
2020-08-16 Luke Kenneth Casso... continue tidyup, comment removal/review. use byte_reve... tree | commitdiff
2020-08-16 Luke Kenneth Casso... fix batch of syntax errors found by running mmu.py tree | commitdiff
2020-08-16 Luke Kenneth Casso... begin tidyup, removing comments after line-by-line... tree | commitdiff
2020-08-15 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-15 Cole Poiriermmu.py fix Cat() semantics fixes https://bugs.libre... tree | commitdiff
2020-08-15 Cole Poiriermmu.py fixes https://bugs.libre-soc.org/show_bug.cgi... tree | commitdiff
2020-08-15 Cole Poiriermmu.py fixes https://bugs.libre-soc.org/show_bug.cgi... tree | commitdiff
2020-08-15 Cole Poiriermmu.py fixes https://bugs.libre-soc.org/show_bug.cgi... tree | commitdiff
2020-08-15 Luke Kenneth Casso... clear compalu data latch always on issue tree | commitdiff
2020-08-15 Cesar StraussDemonstrates string traces tree | commitdiff
2020-08-15 Cesar StraussDemonstrates adding extra debug signals traces to the... tree | commitdiff
2020-08-15 Cesar StraussDemonstrates creating stylish GTKWave "save" files... tree | commitdiff
2020-08-14 Luke Kenneth Casso... remove latchregister, use sync to capture compunit... tree | commitdiff
2020-08-14 Luke Kenneth Casso... sync on alu results in compalu tree | commitdiff
2020-08-13 Luke Kenneth Casso... code-shuffle tree | commitdiff
2020-08-13 Luke Kenneth Casso... remove use of latchregigister, replace with sync on... tree | commitdiff
2020-08-13 Cole Poirierdcache.py add initial imports tree | commitdiff
2020-08-13 Cole Poiriermem_types.py add more types from common.vhdl tree | commitdiff
2020-08-13 Cole Poiriermove memory related types from mmu.py into new file... tree | commitdiff
2020-08-13 Luke Kenneth Casso... sync on reset in compalu tree | commitdiff
2020-08-13 Luke Kenneth Casso... sync on port interface address in ld/st compunit, and... tree | commitdiff
2020-08-13 Luke Kenneth Casso... another sync to cut latency tree | commitdiff
2020-08-13 Cole PoirierInitial commit of translation of microwatt dcache.vhdl... tree | commitdiff
2020-08-13 Luke Kenneth Casso... remove latchregister, sync src oper_i into MultiCompUnit tree | commitdiff
2020-08-13 Luke Kenneth Casso... minor tidyup on alu compunit: tree | commitdiff
2020-08-13 Luke Kenneth Casso... plenty of time to wait for operand, so use "sync" in... tree | commitdiff
2020-08-12 Cole Poiriermmu.py add skeleton sim and test functions from regfile... tree | commitdiff
2020-08-12 Cole PoirierDelete unnecessary mmu dir, move mmu.py out of mmu... tree | commitdiff
2020-08-12 Cole PoirierRevert "Remove mmu dir and associated mmu/test/ dir... tree | commitdiff
2020-08-12 Cole PoirierRemove mmu dir and associated mmu/test/ dir tree | commitdiff
2020-08-12 Cole PoirierRemove rst signals, fix len of hex Consts, fix variable... tree | commitdiff
2020-08-12 Cole PoirierCreate dir experiment/mmu then mmu/test with skeleton... tree | commitdiff
2020-08-12 Cole Poiriermmu.py add RecordObject classes from common.vhdl input... tree | commitdiff
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