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add shift-rot input record and use it
[soc.git]
/
src
/
soc
/
fu
/
shift_rot
/
pipe_data.py
2020-06-01
Luke Kenneth Casso...
add shift-rot input record and use it
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2020-06-01
Luke Kenneth Casso...
put RB in 2nd position (matching immediate) in ShiftRot...
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2020-06-01
Luke Kenneth Casso...
shiftrot uses LogicalOutputData not ALUOutputData
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2020-05-22
Luke Kenneth Casso...
remove sticky overflow from Shift Rot pipeline
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2020-05-22
Luke Kenneth Casso...
create common input pipe spec to avoid code-duplication
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2020-05-21
Luke Kenneth Casso...
move common functionality between PipeSpecs to soc...
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2020-05-21
Luke Kenneth Casso...
move FU IntegerData to directory below
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2020-05-21
Luke Kenneth Casso...
create and use ShiftRotPipeSpec
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2020-05-20
Luke Kenneth Casso...
add register specs to pipeline in/out so that they...
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2020-05-20
Luke Kenneth Casso...
fixup XER names in shift_rot pipe tests
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2020-05-18
Luke Kenneth Casso...
mass-rename of modules to soc.fu.*
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2020-05-18
Luke Kenneth Casso...
rename pipe to fu
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