2020-06-07 |
Luke Kenneth Casso... | add extra args to ISA in branch test_pipe_caller |
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2020-06-07 |
Luke Kenneth Casso... | add msr to ISA in test_core.py |
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2020-06-07 |
Luke Kenneth Casso... | wark-wark, do not & rs[0] into carry-out from rotator |
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2020-06-07 |
Luke Kenneth Casso... | ha! set XER CA/CA32 in simulator from output.value... |
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2020-06-07 |
Luke Kenneth Casso... | update rotator.py to match microwatt rotator.vhdl |
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2020-06-07 |
Luke Kenneth Casso... | add carry test to shift_rot test_pipe_caller: it fails... |
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2020-06-07 |
Luke Kenneth Casso... | add extra args to ISA in test_pipe_caller.py |
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2020-06-07 |
Luke Kenneth Casso... | add make clean target to qemu_test Makefile |
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2020-06-07 |
Luke Kenneth Casso... | optionally writing out CA/CA32 to XER |
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2020-06-07 |
Luke Kenneth Casso... | add handling of CA/CA32 in simulator, generated from... |
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2020-06-07 |
Luke Kenneth Casso... | add CA/CA32 to list of special regs |
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2020-06-07 |
Luke Kenneth Casso... | add missing arg to ISA in test_compunit |
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2020-06-07 |
Luke Kenneth Casso... | Revert "if referred to through GPR (GPR[RA]), add to... |
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2020-06-07 |
Luke Kenneth Casso... | Revert "remove fixedlogical.patch - added gprs to Power... |
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2020-06-07 |
Luke Kenneth Casso... | Revert "add gprs to PowerParser write_regs in p_atom_name" |
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2020-06-07 |
Luke Kenneth Casso... | add extra missing args to ISA setup in alu test_pipe_caller |
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2020-06-07 |
Luke Kenneth Casso... | if referred to through GPR (GPR[RA]), add to read_regs... |
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2020-06-07 |
Luke Kenneth Casso... | add gprs to PowerParser write_regs in p_atom_name |
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2020-06-07 |
Luke Kenneth Casso... | add missing args to ISA |
tree | commitdiff |
2020-06-07 |
Luke Kenneth Casso... | remove fixedlogical.patch - added gprs to PowerParser... |
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2020-06-07 |
Luke Kenneth Casso... | docstring on caller.py inject() decorator |
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2020-06-07 |
Luke Kenneth Casso... | add TRAP function, stub |
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2020-06-07 |
Luke Kenneth Casso... | add MSR to simulator context |
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2020-06-07 |
Luke Kenneth Casso... | move MSR_PR checking to separate functiong |
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2020-06-07 |
colepoirier | Fix missing 'comb +=' |
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2020-06-06 |
Luke Kenneth Casso... | experimenting with setting up and testing memory |
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2020-06-06 |
Luke Kenneth Casso... | expand regwid to 64 in l0_cache test |
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2020-06-06 |
Luke Kenneth Casso... | work out how to initialise memory directly |
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2020-06-06 |
Luke Kenneth Casso... | initialise L0 Memory from simulator memory |
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2020-06-06 |
Luke Kenneth Casso... | wait a little for wr.rel to activate if wrmask is active |
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2020-06-06 |
Luke Kenneth Casso... | missing test.mem arg for ISA in test_core |
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2020-06-06 |
Luke Kenneth Casso... | allow Mem initialisation in ISACaller |
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2020-06-06 |
Luke Kenneth Casso... | shift-mask in Simulator Mem class not quite right |
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2020-06-06 |
Luke Kenneth Casso... | write-mask made from LD and Update mode (for data_o... |
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2020-06-06 |
Luke Kenneth Casso... | allow Mem in Simulator to be initialised |
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2020-06-06 |
Luke Kenneth Casso... | use name of unit to write simulator/vcd file |
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2020-06-06 |
Luke Kenneth Casso... | LDSTCompUnit test data structures linked up, starting... |
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2020-06-06 |
Luke Kenneth Casso... | allow CompLDSTOpSubset to be passed through to LDSTCompUnit |
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2020-06-06 |
Luke Kenneth Casso... | set up LDSTCompUnit using regspec |
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2020-06-06 |
Luke Kenneth Casso... | add extra bugreport link |
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2020-06-06 |
Luke Kenneth Casso... | whitespace |
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2020-06-06 |
Luke Kenneth Casso... | whitespace indentation |
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2020-06-06 |
Luke Kenneth Casso... | add special-case LDSTFunctionUnit |
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2020-06-06 |
Luke Kenneth Casso... | whoops dest%d_o not dest%d_i |
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2020-06-06 |
Luke Kenneth Casso... | add beginnings of LDST compunit test |
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2020-06-06 |
Luke Kenneth Casso... | whitespace |
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2020-06-06 |
Luke Kenneth Casso... | whitespace / code-munge |
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2020-06-06 |
Luke Kenneth Casso... | comments / whitespace |
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2020-06-06 |
Luke Kenneth Casso... | update stage docstring |
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2020-06-06 |
Luke Kenneth Casso... | code-munge |
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2020-06-06 |
Luke Kenneth Casso... | remove unneeded imports |
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2020-06-06 |
Luke Kenneth Casso... | noticed the regular pattern in all pipe_data.py (regspecs). |
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2020-06-05 |
Luke Kenneth Casso... | comment out CR assertion for now |
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2020-06-05 |
colepoirier | Added skeleton fu/trap/test/test_pipe_caller using |
tree | commitdiff |
2020-06-05 |
colepoirier | Add trap_input_data.py for fu/trap, cookie-cut from |
tree | commitdiff |
2020-06-05 |
Tobias Platen | fix proof_datamerger (see 216#c56) |
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2020-06-05 |
Luke Kenneth Casso... | update comments |
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2020-06-05 |
Luke Kenneth Casso... | add comments and start of elaborate |
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2020-06-05 |
Luke Kenneth Casso... | more comments |
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2020-06-05 |
Luke Kenneth Casso... | more comments |
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2020-06-05 |
Luke Kenneth Casso... | a_i not b_in |
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2020-06-05 |
Luke Kenneth Casso... | add comments |
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2020-06-05 |
Luke Kenneth Casso... | experimenting with CR, not quite right |
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2020-06-05 |
colepoirier | Made small changes to fu/trap/main_stage to bring nmige... |
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2020-06-05 |
Tobias Platen | implement init function of DualPortSplitter |
tree | commitdiff |
2020-06-05 |
Tobias Platen | uncomment rtlil.convert in test_l0_cache that causes... |
tree | commitdiff |
2020-06-05 |
Luke Kenneth Casso... | whoops returning cr2 for cr3 regspec map |
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2020-06-05 |
Luke Kenneth Casso... | name regfile ports by name not numerical position |
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2020-06-05 |
Luke Kenneth Casso... | whoops connecting up CR in wrong order. fixing with... |
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2020-06-05 |
Luke Kenneth Casso... | fix syntax errors and use correct FastRegs (SRR0/1... |
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2020-06-05 |
Luke Kenneth Casso... | add TODO for MFSPR/MTSPR |
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2020-06-05 |
Luke Kenneth Casso... | refer to srr0/1 not a/b |
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2020-06-05 |
Luke Kenneth Casso... | add msr_copy function and use it in OP_TRAP, OP_RFID... |
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2020-06-05 |
Luke Kenneth Casso... | set SRR0 in OP_SC |
tree | commitdiff |
2020-06-05 |
Luke Kenneth Casso... | add OP_RFID SRR0/SRR1 in PowerDecode2 |
tree | commitdiff |
2020-06-04 |
colepoirier | Use a_i and b_i convenience variables instead of a... |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | testing CRs after writing: not in the right bit-order |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | remove unneeded code |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | use common TestCase class in logical |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | add branch test case to core |
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2020-06-04 |
Luke Kenneth Casso... | no global variables in test suites |
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2020-06-04 |
Luke Kenneth Casso... | sigh. because POWER. CR index inversion |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | sigh. weirdness involving bit-inversion, inconsistency... |
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2020-06-04 |
Luke Kenneth Casso... | no global variables in test suites |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | add ShiftRot test case (works only because CRs are... |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | add both logical and ALU test core |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | no global variables in test suites |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | no global variables in test suites |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | no global variables in test suites |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | whoops, docstring indentation |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | add docstrings for read/write port connection |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | move core code into separate functions, for clarity |
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2020-06-04 |
Luke Kenneth Casso... | reduce amount of code in SelectableInt |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | oops forgot to switch write-enable off |
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2020-06-04 |
Luke Kenneth Casso... | comment clarify on core |
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2020-06-04 |
Luke Kenneth Casso... | initialise XER from simulation |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | messing with valid/busy signals in core test |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | add extra argument (not used) to regfile.py |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | hmmm sync-delay wport write and wen |
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2020-06-04 |
Luke Kenneth Casso... | whitespace |
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