| 2020-06-28 |
Luke Kenneth Casson... | add test instruction memory
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | add readonly option to TestMemory
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | expand instruction bus width to 64 bit, start on a...
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | parameterise minerva i-cache
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | got Pi2LSUI FSM working
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | sram address do not cut by LSBs
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | new Pi2LSUI working, using PortInterfaceBase
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | start new version of Pi2LSUI based on PortInterfaceBase
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | pass addr/mask through to PortInterfaceBase rd/wr addr
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | cleanup (remove unneeded imports)
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | more code-shuffle for TestMemoryPortInterface
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | more code-shuffle for TestMemoryPortInterface
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | minor cleanup, put get/set rdport/wrport into function
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | merge LDSTPort into TestMemoryPortInterface
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | use PortInterface connect_port
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | use PortInterface connect_port
|
commit | commitdiff | tree |
| 2020-06-28 |
Luke Kenneth Casson... | attempt to get Pi2LSUI FSM working
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | only activate ld_in_progress if addr is ok
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | make Memory accessible via TestSRAMBareLoadStoreUnit
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | increase (double) address width in TstL0CacheBuffer
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | increase (double) address width in TstL0CacheBuffer
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | unit test in l0_cache to connect to testpi and test_bare_wb
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | make PortInterface modules consistent with same API
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | use ConfigMemoryPortInterface in TstL0CacheBuffer
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | fix TestMemLoadStoreUnit, it required a FSM to monitor...
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | add wishbone Pi2LSUI test
|
commit | commitdiff | tree |
| 2020-06-27 |
Luke Kenneth Casson... | reconfigureable PortInterface testing now possible
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | name issue in Pi2LSUI
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | whitespace and imports
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | whitespace
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | slight reorg on test_pi2ls.py
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | correct address in pi2ls
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | oops forgot to initialise base class of TestMemLoadStoreUnit
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | add in LenExpand shift/mask
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | add quick test showing Pi2LSUI not quite reading/writing to
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | remove extraneous yields
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | set address ok and fix unit test to check it properly
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | add pi.busy_o connection, increase to 64 bit
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | unit test broken is ok :)
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | set pi.ld.ok to 1 if pi.is_ld_i is set
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | load/store unit test needed to wait for busy_o
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | whitespace
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | clean up output from BareLoadStoreUnit
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | halve the test memory size again
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | shrink test memory size down to only 64 words
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | investigating why write-enable not getting passed through
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | whoops forgot to call parent elaborate
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | add test of SRAM through wishbone bus
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | code-morph which redirects lsmem unit test through...
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | add a test SRAM that lives behind a minerva LoadStoreUnitInt...
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | dynamically specify wishbone layout (no longer hardcoded...
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | add reconfigureable Load/Store class
|
commit | commitdiff | tree |
| 2020-06-26 |
Luke Kenneth Casson... | extra parameterification of minerva LoadStoreUnits
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | allow Pi2LSUI to accept incoming PortInterface and...
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | add extra parameter, mask_wid, to TestMemLoadStoreUnit
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | start connecting up Pi2LSUI
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | add LenExpand module, tidyup on docstring
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | add beginnings of Pi2LSUI
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | add nmigen-soc to dependencies
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | add attempt at mapping between PortInterface and LoadStoreUn...
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | rename LoadStoreInterface signals to include _i and...
|
commit | commitdiff | tree |
| 2020-06-25 |
Luke Kenneth Casson... | whitespace
|
commit | commitdiff | tree |
| 2020-06-24 |
Luke Kenneth Casson... | move comments to minerva LoadStoreInterface
|
commit | commitdiff | tree |
| 2020-06-24 |
Luke Kenneth Casson... | import minerva and use LoadStoreUnitInterface
|
commit | commitdiff | tree |
| 2020-06-23 |
Luke Kenneth Casson... | annoying error in latest nmigen
|
commit | commitdiff | tree |
| 2020-06-23 |
Luke Kenneth Casson... | TstL0CacheBuffer returns array of ports differently now
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | remove unused module
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | simplified L0CacheBuffer down to a "PortInterface Arbiter"
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | add TestMemoryPortInterface class which is designed...
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | comments for LDST CompUnit test
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | enable byte-reverse in CompLDSTUnit test
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | remove CompLDSTOpSubset, replace with just data_len.
|
commit | commitdiff | tree |
| 2020-06-22 |
Luke Kenneth Casson... | move BE/LE byte-reverse into LDSTCompUnit
|
commit | commitdiff | tree |
| 2020-06-20 |
Luke Kenneth Casson... | expand Memory width to 64 and granularity to 16 in...
|
commit | commitdiff | tree |
| 2020-06-20 |
Luke Kenneth Casson... | add asserts to check data output is correct
|
commit | commitdiff | tree |
| 2020-06-20 |
Luke Kenneth Casson... | add test_sram_wishbone.py
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | whitespace update
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | move trunc_div and trunc_rem to nmutil
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add comments on trunc_div and trunc_rem
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add divide-by-zero test to test_div_sim.py
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add docstring comment for SelectableInt
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add test_0_moduw and correct name to trunc_rem
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add abs SelectableInt unit test (very quick)
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add SelectableInt.abs
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add another bad hack in parser.py which identifies...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add in really bad hack which calls trunc_div or trunc_mod
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add trunc_div and trunch_rem to decoder helpers
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | auto-assign needs to use concat / selectconcat
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | whoops detected page name wrong, for special case fixedshift
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | bit of a mess. getting carry recognised and output...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add auto-assign mode detecting uninitialised variable...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | div needs to be floordiv
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add true and floor div to SelectableInt
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add simulator test for divw
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | do mix-in for test_sim.py so that jacob can write some...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | add TODO comments to upgrade L0CacheBuffer to a new...
|
commit | commitdiff | tree |
| 2020-06-19 |
Luke Kenneth Casson... | parameterise LoadStoreUnitInterface to be expandable
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | enable general test cases in test_issuer
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | got loop example operational by noting when PC fastreg...
|
commit | commitdiff | tree |
| 2020-06-18 |
Luke Kenneth Casson... | use different way to pass instructions to test_issuer...
|
commit | commitdiff | tree |
| next |
projects / soc.git / search