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add RADIX skeleton and unit test
[soc.git] / src / soc / decoder /
2021-03-03 Tobias Platenadd RADIX skeleton and unit test tree | commitdiff
2021-03-03 Luke Kenneth Casso... add debug strings tree | commitdiff
2021-03-03 Luke Kenneth Casso... remove singleton pattern tree | commitdiff
2021-03-02 Luke Kenneth Casso... operating correctly, not directing MMU SPRs to SPR... tree | commitdiff
2021-03-01 Luke Kenneth Casso... Revert "fix Bug 607 - unnecessary code added related... tree | commitdiff
2021-03-01 Luke Kenneth Casso... move SVP64 RM decoder to separate module tree | commitdiff
2021-02-28 Luke Kenneth Casso... start on SVP64 RM Mode decoder tree | commitdiff
2021-02-28 Luke Kenneth Casso... more SVP64 enums tree | commitdiff
2021-02-28 Luke Kenneth Casso... add SVP64 RM sub-field enums tree | commitdiff
2021-02-28 Luke Kenneth Casso... move SVP64 Extra decoders to separate module tree | commitdiff
2021-02-28 Luke Kenneth Casso... fix syntax error tree | commitdiff
2021-02-28 Luke Kenneth Casso... move SVP64PrefixDecoder to separate module tree | commitdiff
2021-02-28 Luke Kenneth Casso... add PowerDecoder.no_in_vec tree | commitdiff
2021-02-28 Luke Kenneth Casso... add svp64_instrs to power_svp64 tree | commitdiff
2021-02-28 Tobias Platenfix Bug 607 - unnecessary code added related to MMU... tree | commitdiff
2021-02-28 Tobias Platenfix Bug 603 - use SPR names/numbers from sprs.csv tree | commitdiff
2021-02-27 Luke Kenneth Casso... use PowerDecoder2.no_out_vec instead of manual vector... tree | commitdiff
2021-02-27 Luke Kenneth Casso... add corresponding VL=0 unit test as from 161b7d67b... tree | commitdiff
2021-02-24 Luke Kenneth Casso... add comments explaining split tree | commitdiff
2021-02-24 Luke Kenneth Casso... move DecodeCROut/In (at last) out of PowerDecoderSubset... tree | commitdiff
2021-02-24 Luke Kenneth Casso... start making write_cr0 independent of DecodeCROut tree | commitdiff
2021-02-22 Cesar StraussFix typo when calculating PowerDecoder2.no_out_vec tree | commitdiff
2021-02-21 Luke Kenneth Casso... add CR out vector detection to PowerDecoder2 no_out_vec tree | commitdiff
2021-02-21 Cesar StraussThe new version of "sel" is smart enough to find a... tree | commitdiff
2021-02-21 Luke Kenneth Casso... comments in SVP64RMFields tree | commitdiff
2021-02-21 Cesar StraussUse the new selection field function from nmutil tree | commitdiff
2021-02-21 Cesar StraussUse symbolic values as field sizes tree | commitdiff
2021-02-21 Cesar StraussReplace all hardcoded shifts into RM by usage of SVP64R... tree | commitdiff
2021-02-21 Luke Kenneth Casso... create SVP64CROffs consts for when SVP64 Vector-of... tree | commitdiff
2021-02-20 Luke Kenneth Casso... comments on sv.add. Rc=1 unit test tree | commitdiff
2021-02-20 Luke Kenneth Casso... add in Vectorised CRs when Rc=1 into ISACaller tree | commitdiff
2021-02-20 Luke Kenneth Casso... add CR1 to DecodeCRIn/Out tree | commitdiff
2021-02-20 Luke Kenneth Casso... add some debug checking to get_pdecode_cr_out tree | commitdiff
2021-02-20 Luke Kenneth Casso... add crossreference to bug #603 tree | commitdiff
2021-02-20 Luke Kenneth Casso... add more debug output to get_pdecode_cr_out tree | commitdiff
2021-02-20 Cesar StraussAssemble the SV64 prefix from its subfields using SVP64... tree | commitdiff
2021-02-20 Luke Kenneth Casso... start on CRs in SVP64 mode tree | commitdiff
2021-02-20 Cesar StraussFix more MSB0 issues in comments tree | commitdiff
2021-02-20 Cesar StraussReplace more hardcoded constants with symbolic field... tree | commitdiff
2021-02-20 Luke Kenneth Casso... increment CRs based on srcstep, see what happens tree | commitdiff
2021-02-17 Cesar StraussUse subfield bit selection to extract the RM SVP64... tree | commitdiff
2021-02-17 Cesar StraussReplace MSB-i by symbolic subfield indices and selectors tree | commitdiff
2021-02-17 Luke Kenneth Casso... fix reg read/write in ISACaller, PowerDecoder2 handles... tree | commitdiff
2021-02-16 Cesar StraussFix MSB0 issues for SVP64 tree | commitdiff
2021-02-16 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-02-16 Luke Kenneth Casso... ordering wrong on svstate in ISACaller tree | commitdiff
2021-02-16 Luke Kenneth Casso... add indicator to PowerDecoder2 when no outputs are... tree | commitdiff
2021-02-15 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-02-14 Cesar StraussFix width of the "extra" input on the Extra decoder tree | commitdiff
2021-02-14 Cesar StraussFix conversion to MSB0 tree | commitdiff
2021-02-14 Luke Kenneth Casso... add srcstep onto Vectorised GPRs in PowerDecoder2 tree | commitdiff
2021-02-13 Tobias PlatenOP_TLBIE must in be instr_is_priv tree | commitdiff
2021-02-13 Tobias Platenkeep commits to under 80 chars tree | commitdiff
2021-02-13 Luke Kenneth Casso... update svp64 unit test comments tree | commitdiff
2021-02-13 Tobias Platenforward microwatt mmu specific SPR: PID and PRTBL tree | commitdiff
2021-02-12 Luke Kenneth Casso... add skip of instruction if SVSTATE.VL=0 in ISACaller tree | commitdiff
2021-02-12 Luke Kenneth Casso... validate all registers to make sure no damage occurs... tree | commitdiff
2021-02-12 Luke Kenneth Casso... add srcstep and correct PC-advancing during Sub-PC... tree | commitdiff
2021-02-12 Luke Kenneth Casso... comments tree | commitdiff
2021-02-12 Luke Kenneth Casso... add in SVSTATE.srcstep update, loop from 0 to VL-1 tree | commitdiff
2021-02-12 Luke Kenneth Casso... allow PC to update by 8 in SVP64 mode tree | commitdiff
2021-02-12 Luke Kenneth Casso... fix setting of SVSTATE.VL and MVL tree | commitdiff
2021-02-12 Luke Kenneth Casso... add in SVSTATE to ISACaller, not used, just passed in tree | commitdiff
2021-02-11 Luke Kenneth Casso... comments in TestIssuer for SVP64PrefixDecoder tree | commitdiff
2021-02-10 Luke Kenneth Casso... add svp64 reg decode detection to ISACaller output tree | commitdiff
2021-02-10 Luke Kenneth Casso... starting to add SVP64 register EXTRA-read and isvec... tree | commitdiff
2021-02-10 Luke Kenneth Casso... comment update tree | commitdiff
2021-02-04 Tobias Platenpass SPR MicroOp to MMU function unit tree | commitdiff
2021-02-03 Luke Kenneth Casso... nope - need it to be zero if not identified as svp64 tree | commitdiff
2021-02-03 Luke Kenneth Casso... actually no need to mux in the svp64_rm, just the id... tree | commitdiff
2021-02-03 Luke Kenneth Casso... add SVP64PowerDecoder, extracts svp64 remap if correctl... tree | commitdiff
2021-02-01 Luke Kenneth Casso... ISACaller, in svp64 mode, read the next 32 bits when... tree | commitdiff
2021-02-01 Luke Kenneth Casso... sort out SelectableInt bit-ordering for identifying... tree | commitdiff
2021-01-31 Luke Kenneth Casso... start an ISACaller SVP64 unit test tree | commitdiff
2021-01-31 Luke Kenneth Casso... test SVP64 major opcode, start checking if it is EXT001... tree | commitdiff
2021-01-31 Luke Kenneth Casso... adjusting ISACaller unit test to use ISACaller.setup_one() tree | commitdiff
2021-01-31 Luke Kenneth Casso... fix ISACaller unit test tree | commitdiff
2021-01-31 Tobias Platenfix two syntax errors in src/soc/decoder/isa/caller.py tree | commitdiff
2021-01-31 Luke Kenneth Casso... SVP64 Remap Fields structures for ISACaller tree | commitdiff
2021-01-31 Luke Kenneth Casso... remove sv_rm from PowerDecoder register decoders tree | commitdiff
2021-01-31 Luke Kenneth Casso... add SVSTATE SPR sub-field accessor class to ISACaller tree | commitdiff
2021-01-31 Luke Kenneth Casso... move SVP64 Extra reg decoding into main PowerDecoder... tree | commitdiff
2021-01-31 Luke Kenneth Casso... update submodule tree | commitdiff
2021-01-30 Luke Kenneth Casso... move CR in/out SVP64 EXTRA decoders into PowerDecoder tree | commitdiff
2021-01-30 Luke Kenneth Casso... add SVP64 CR out extending to 7-bit in PowerDecoder2 tree | commitdiff
2021-01-30 Luke Kenneth Casso... add SVP64 CR EXTRA field-extension, from 3-bit to 7... tree | commitdiff
2021-01-30 Luke Kenneth Casso... extend CR registers in Decode2ToExecute1Type to 7 bit tree | commitdiff
2021-01-30 Luke Kenneth Casso... add SVP64CRExtra class to PowerDecoder2, turns 3-bit... tree | commitdiff
2021-01-30 Luke Kenneth Casso... split out SVEXTRA field selection/decoding into separat... tree | commitdiff
2021-01-30 Luke Kenneth Casso... whoops update PowerDecoder2 svp64 comments, reg sizes... tree | commitdiff
2021-01-30 Luke Kenneth Casso... add SVP64 EXTRA decoding to RB, RC and RT (out) in... tree | commitdiff
2021-01-30 Luke Kenneth Casso... add first SVP64 7-bit register context decoder to Power... tree | commitdiff
2021-01-29 Luke Kenneth Casso... add SVP64RM record to PowerDecoder2 tree | commitdiff
2021-01-29 Luke Kenneth Casso... increase register number sizes from 5 to 7 tree | commitdiff
2021-01-29 Luke Kenneth Casso... adjust SVP64RM class to output more PowerDecoder-friend... tree | commitdiff
2021-01-29 Luke Kenneth Casso... adjust how register copy/setup is done in PowerDecoder2 tree | commitdiff
2021-01-29 Luke Kenneth Casso... add SV etype/ptype to power decoder tree | commitdiff
2021-01-29 Luke Kenneth Casso... whoops syntax error. submodule update tree | commitdiff
2021-01-29 Luke Kenneth Casso... start adding svp64 enums tree | commitdiff
2021-01-29 Luke Kenneth Casso... use new svp64-augmented csv reader in PowerDecoder tree | commitdiff
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