projects / soc.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
check problem state in OP_MTMSRD from original reg RA rather than
[soc.git] / src / soc / fu /
2021-12-22 Luke Kenneth Casso... check problem state in OP_MTMSRD from original reg... tree | commitdiff
2021-12-22 Luke Kenneth Casso... remove unneeded state in LoadStore1 tree | commitdiff
2021-12-22 Luke Kenneth Casso... clear instruction fault on exception WAIT_MMU ACK in... tree | commitdiff
2021-12-22 Luke Kenneth Casso... clear out instr_fault when exception is thrown tree | commitdiff
2021-12-22 Luke Kenneth Casso... clear instruction fault on idle/valid in Loadstore1 tree | commitdiff
2021-12-21 Luke Kenneth Casso... for each unit test case in test_issuer_mmu_data_path... tree | commitdiff
2021-12-21 Luke Kenneth Casso... test_issuer_mmu_data_path.py needs to use wb_get because of tree | commitdiff
2021-12-20 Luke Kenneth Casso... unit tests for SPRs when MMU enabled, tree | commitdiff
2021-12-18 Luke Kenneth Casso... forgot to connect up I-Cache to MMU tree | commitdiff
2021-12-14 Luke Kenneth Casso... get OP_FETCH_FAILED to respond/return an exception... tree | commitdiff
2021-12-14 Luke Kenneth Casso... MMU LOOKUP for fetch failed, priv mode is inversion... tree | commitdiff
2021-12-14 Luke Kenneth Casso... link MSR.PR into MMU FSM OP_FETCH_FAILED tree | commitdiff
2021-12-13 Luke Kenneth Casso... convert LoadStore1 to new msr.pr/dr/sf tree | commitdiff
2021-12-13 Luke Kenneth Casso... add msr to MMU Op Subset record tree | commitdiff
2021-12-12 Luke Kenneth Casso... delay MMU LOOKUP done by one clock so that the exceptio... tree | commitdiff
2021-12-12 Luke Kenneth Casso... bring MMU exception out where AllFunctionUnits (and... tree | commitdiff
2021-12-12 Luke Kenneth Casso... bring exception out from MMU FSM, correct "done" tree | commitdiff
2021-12-12 Luke Kenneth Casso... add LDSTException output to MMU tree | commitdiff
2021-12-11 Luke Kenneth Casso... connect up I-Cache to FetchUnitInterface tree | commitdiff
2021-12-10 Jacob Lifshayadd ternlogi to shift_rot formal test tree | commitdiff
2021-12-10 Jacob Lifshayfix shift_rot formal proof tree | commitdiff
2021-12-09 Luke Kenneth Casso... add I-Cache to FSM local variables tree | commitdiff
2021-12-09 Luke Kenneth Casso... include SPR.TB in SPR FU tree | commitdiff
2021-12-09 Jacob Lifshayadd bitmanip tests tree | commitdiff
2021-12-09 Jacob Lifshayadd CommonPipeSpec.__getattr__ to forward attributes... tree | commitdiff
2021-12-09 Jacob Lifshayadd parent_pspec everywhere tree | commitdiff
2021-12-09 Jacob Lifshayformat code tree | commitdiff
2021-12-08 Luke Kenneth Casso... add OP_FETCH_FAILED to MMU Function Unit tree | commitdiff
2021-12-08 Luke Kenneth Casso... make LoadStore1 intsr_fault a "captured flag" - strictl... tree | commitdiff
2021-12-08 Luke Kenneth Casso... remove MSR and add CIA to MMU Input Record tree | commitdiff
2021-12-08 Luke Kenneth Casso... add instr_fault to LoadStore1 FSM tree | commitdiff
2021-12-08 Jacob Lifshayadd comment about draft instructions tree | commitdiff
2021-12-08 Jacob Lifshayaccount for Mock absurdities tree | commitdiff
2021-12-07 Luke Kenneth Casso... set separate "iside" signal in LoadStore1 to not confuse it tree | commitdiff
2021-12-07 Luke Kenneth Casso... add in I-Cache into LoadStore1 - presently unused ... tree | commitdiff
2021-12-07 Jacob Lifshaymake bitmanip operations conditional on pspec.draft_bit... tree | commitdiff
2021-12-07 Jacob Lifshayformat code tree | commitdiff
2021-12-07 Jacob Lifshaymove rotator mode assignments as requested by lkcl tree | commitdiff
2021-12-07 Jacob Lifshayformat code tree | commitdiff
2021-12-05 Luke Kenneth Casso... code-comments tree | commitdiff
2021-12-05 Luke Kenneth Casso... wishbone bus convert on dcache tree | commitdiff
2021-12-04 Luke Kenneth Casso... sigh in MMU FSM use direct access to ldst.dar/dsisr... tree | commitdiff
2021-12-04 Luke Kenneth Casso... put DSISR and DAR publicly accessible in LoadStore1 tree | commitdiff
2021-12-04 Luke Kenneth Casso... whoops fix up exception happened if alignment triggers... tree | commitdiff
2021-12-04 Luke Kenneth Casso... fixing DAR updating from exceptions tree | commitdiff
2021-12-04 Luke Kenneth Casso... MMU lookup DSISR load bit inverted in LoadStore1 tree | commitdiff
2021-12-04 Luke Kenneth Casso... store DAR in LoadStore1 tree | commitdiff
2021-12-04 Luke Kenneth Casso... not busy if excrption occurs on MMU_LOOKUP in loadstore.py tree | commitdiff
2021-12-04 Luke Kenneth Casso... add means to update dsisr from MMU FSM. TODO: add a... tree | commitdiff
2021-12-03 Luke Kenneth Casso... priv_mode/virt_mode are set in the request, which is... tree | commitdiff
2021-12-03 Luke Kenneth Casso... in loadstore.py set align_intr from request which comes... tree | commitdiff
2021-12-03 Luke Kenneth Casso... driver conflict on priv_mode and virt_mode, do not... tree | commitdiff
2021-12-03 Luke Kenneth Casso... in loadstore.py, when an exception is done or if the FSM tree | commitdiff
2021-12-03 Luke Kenneth Casso... comment out dsisr and dar in mmu FSM for now tree | commitdiff
2021-12-02 Jacob Lifshayremove bitmanip fu cuz ternlogi (the only instruction... tree | commitdiff
2021-12-02 Jacob Lifshayadd ternlogi to shiftrot tree | commitdiff
2021-12-02 Jacob Lifshayformat code tree | commitdiff
2021-12-01 Luke Kenneth Casso... stack of changes to MultiCompUnit to speed it up tree | commitdiff
2021-12-01 Luke Kenneth Casso... experimenting with option to shorten MultiCompUnit... tree | commitdiff
2021-12-01 Luke Kenneth Casso... create single-stage ALU pipeline, shorten latency on... tree | commitdiff
2021-12-01 Luke Kenneth Casso... FunctionUnitBaseMulti which derives from ReservationSta... tree | commitdiff
2021-12-01 Luke Kenneth Casso... use m.submodules[name] instead of getattr tree | commitdiff
2021-12-01 Luke Kenneth Casso... add Regspecs get_io_spec function tree | commitdiff
2021-11-30 Luke Kenneth Casso... start allocating more FUs (more ReservationStations) tree | commitdiff
2021-11-30 Tobias Platenreturn correct data from microwatt tree | commitdiff
2021-11-30 Tobias Platenloadstore: add done_delay tree | commitdiff
2021-11-25 Tobias Platenremove unuses dsisr signal tree | commitdiff
2021-11-25 Tobias Platenreset state to idle on exception tree | commitdiff
2021-11-19 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2021-11-19 Luke Kenneth Casso... create lists of latches in each FU, to record the read... tree | commitdiff
2021-11-17 Jacob Lifshaystart adding bitmanip FU tree | commitdiff
2021-11-16 Tobias Platenloadstore1 now reports exception reason tree | commitdiff
2021-11-15 Tobias Platenreport dar on exception + test case tree | commitdiff
2021-11-10 Luke Kenneth Casso... remove read of MSR, it is done by passing through Power... tree | commitdiff
2021-11-10 Luke Kenneth Casso... whitespace tree | commitdiff
2021-11-10 Luke Kenneth Casso... add fetch of MSR in LD/ST pipe_data tree | commitdiff
2021-11-08 Tobias Platenmmu unit test working again tree | commitdiff
2021-11-08 Luke Kenneth Casso... remove unneeded imports tree | commitdiff
2021-11-07 Luke Kenneth Casso... make FSMDivCoreStage properly conform to Stage API tree | commitdiff
2021-11-07 Luke Kenneth Casso... switch over to single-entry (num_rows=1) ReservationSta... tree | commitdiff
2021-11-06 Tobias Platenupdate test_issuer_mmu.py testcase, add needed debug... tree | commitdiff
2021-11-04 Luke Kenneth Casso... use ReservationStations2 (disabled for now) tree | commitdiff
2021-11-04 Luke Kenneth Casso... fix missing naming ready_i -> i_ready tree | commitdiff
2021-11-03 Tobias Platencleanup fsm tree | commitdiff
2021-11-03 Tobias Platenloadstore.py: add Display statement on SPR change tree | commitdiff
2021-11-03 Tobias Platenadd first tlbie test case tree | commitdiff
2021-11-02 Tobias Platenmmu fsm: symbols have been renamed tree | commitdiff
2021-11-02 Tobias Platenhack to fix UnusedElaboratables in src/soc/fu/mmu/test... tree | commitdiff
2021-11-01 Luke Kenneth Casso... add beginnings of FunctionUnitBaseMulti tree | commitdiff
2021-11-01 Tobias Platenhack: resolve DriverConflict in src/soc/fu/mmu/fsm.py tree | commitdiff
2021-10-30 Tobias Platenloadstore.py: add debug output for dcbz tree | commitdiff
2021-10-10 Luke Kenneth Casso... replace PartitionedSignal with SimdSignal tree | commitdiff
2021-10-08 Tobias Platenan extra dcbz parameter in all six places tree | commitdiff
2021-10-08 Luke Kenneth Casso... commented-out and disabled the set_dcbz_addr function... tree | commitdiff
2021-10-08 Tobias Platendcbz symbol rename tree | commitdiff
2021-10-08 Tobias Platenloadstore.py: add function set_dcbz_addr tree | commitdiff
2021-10-03 Tobias Platenan extra dcbz parameter in all six places tree | commitdiff
2021-10-02 Luke Kenneth Casso... commented-out and disabled the set_dcbz_addr function... tree | commitdiff
2021-10-02 Tobias Platendcbz symbol rename tree | commitdiff
2021-10-02 Tobias Platenloadstore.py: add function set_dcbz_addr tree | commitdiff
next