2020-06-18 |
Jacob Lifshay | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2020-06-18 |
Luke Kenneth Casso... | slightly hacky way to keep an eye on the PC |
tree | commitdiff |
2020-06-16 |
Luke Kenneth Casso... | add test instruction memory SRAM |
tree | commitdiff |
2020-06-05 |
Luke Kenneth Casso... | name regfile ports by name not numerical position |
tree | commitdiff |
2020-06-05 |
Luke Kenneth Casso... | whoops connecting up CR in wrong order. fixing with... |
tree | commitdiff |
2020-06-05 |
Luke Kenneth Casso... | fix syntax errors and use correct FastRegs (SRR0/1... |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | initialise XER from simulation |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | add extra argument (not used) to regfile.py |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | use copy of FHDLTestCase |
tree | commitdiff |
2020-06-04 |
Luke Kenneth Casso... | missing a fastregs write-port |
tree | commitdiff |
2020-06-03 |
Luke Kenneth Casso... | connect read-enable and src_i to regfile ports |
tree | commitdiff |
2020-06-03 |
Luke Kenneth Casso... | start putting a non-production core together, |
tree | commitdiff |
2020-06-03 |
Luke Kenneth Casso... | decide to elaborate Refiles *into* another class, rathe... |
tree | commitdiff |
2020-06-03 |
Luke Kenneth Casso... | turn RegFiles into module, add all regfiles to it |
tree | commitdiff |
2020-06-03 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2020-06-03 |
Luke Kenneth Casso... | add class containing all regfiles |
tree | commitdiff |
2020-06-03 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2020-06-02 |
Luke Kenneth Casso... | decode fast spr for OP_BCREG CTR, TAR and LR |
tree | commitdiff |
2020-06-02 |
Luke Kenneth Casso... | whoops cut/paste error, creating write_ports not read_ports |
tree | commitdiff |
2020-06-01 |
Michael Nolan | Add proof for RegFile |
tree | commitdiff |
2020-06-01 |
Michael Nolan | Add proof for RegFileArray |
tree | commitdiff |
2020-06-01 |
Michael Nolan | Have regfile use AnySeq instead of AnyConst |
tree | commitdiff |
2020-06-01 |
Michael Nolan | Enable k-induction for register file proof |
tree | commitdiff |
2020-06-01 |
Michael Nolan | That was weird. For some reason it wasn't generating... |
tree | commitdiff |
2020-06-01 |
Michael Nolan | Full BMC proof of Register |
tree | commitdiff |
2020-06-01 |
Michael Nolan | Begin rewrite of proof_regfile.py |
tree | commitdiff |
2020-05-29 |
Luke Kenneth Casso... | interesting. use of Settle() works, showing that Regfi... |
tree | commitdiff |
2020-05-28 |
Luke Kenneth Casso... | messing about with proof_regfile.py |
tree | commitdiff |
2020-05-28 |
colepoirier | Added Initial() synchronous check with draft truth |
tree | commitdiff |
2020-05-28 |
Luke Kenneth Casso... | hmm.... |
tree | commitdiff |
2020-05-28 |
colepoirier | Add sync Assert for _wrports 'wen' signal in proof_regf... |
tree | commitdiff |
2020-05-27 |
Luke Kenneth Casso... | do not use range(0, x) - just range(x) |
tree | commitdiff |
2020-05-27 |
Luke Kenneth Casso... | remove write-block on register zero |
tree | commitdiff |
2020-05-27 |
colepoirier | Derive proof_regfile Driver from regfile.Register(... |
tree | commitdiff |
2020-05-27 |
colepoirier | Fix indentation of regfile/formal/proof_regfile.py |
tree | commitdiff |
2020-05-27 |
colepoirier | First commit of proof of regfile, not working yet |
tree | commitdiff |
2020-05-27 |
Luke Kenneth Casso... | add extra INT regs port for now, add Fast Regfile |
tree | commitdiff |
2020-05-27 |
Luke Kenneth Casso... | added XER and CR regfiles, using new VirtualRegPort |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | check assertions |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | make read/write regs properly internal |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | add VirtualRegPort test, seems to demonstrate it working |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | remove sync (not needed) |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | get score6600_multi.py working again |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | redo focus of virtual reg port to do only full datawidt... |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | sort-of (maybe) implemented a virtual port on top of... |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | try new variant of VirtualRegFile |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | use nmutil treereduce |
tree | commitdiff |
2020-05-26 |
Luke Kenneth Casso... | continue virtual regfile port |
tree | commitdiff |
2020-05-26 |
colepoirier | First attempt at implementing block access rd and wr... |
tree | commitdiff |
2020-05-25 |
Luke Kenneth Casso... | correct links in regfile docstring |
tree | commitdiff |
2020-05-25 |
Luke Kenneth Casso... | document regfiles |
tree | commitdiff |
2020-05-25 |
Luke Kenneth Casso... | add INT, SPR and CR regfiles |
tree | commitdiff |
2020-05-24 |
Luke Kenneth Casso... | add stub regfiles.py |
tree | commitdiff |
2020-03-09 |
Luke Kenneth Casso... | move all source directories to soc so that "import... |
tree | commitdiff |
|