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debug radix mmu ISACaller
[soc.git]
/
src
/
2021-03-09
Luke Kenneth Casso...
debug radix mmu ISACaller
tree
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commitdiff
2021-03-09
Tobias Platen
comment out broken spr code
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commitdiff
2021-03-09
Tobias Platen
_walk_tree: access sprs
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commitdiff
2021-03-09
Luke Kenneth Casso...
create first check_perms RADIX ISACaller function
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commitdiff
2021-03-09
Luke Kenneth Casso...
move Mem class out of ISACaller
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commitdiff
2021-03-09
Luke Kenneth Casso...
cleanup imports
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commitdiff
2021-03-09
Luke Kenneth Casso...
move ISACaller RADIX MMU class to separate module
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commitdiff
2021-03-09
Luke Kenneth Casso...
add pgtable and pte calculation to RADIX ISACaller
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commitdiff
2021-03-09
Cesar Strauss
Enable VL==0 vector instruction skip test case
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commitdiff
2021-03-09
Cesar Strauss
Add some extra debug traces to the GTKWave document
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commitdiff
2021-03-09
Cesar Strauss
Create a new signal for the Simulator to wait on
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commitdiff
2021-03-08
Luke Kenneth Casso...
start adding _get_prtable_addr
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commitdiff
2021-03-08
Luke Kenneth Casso...
actually make it possible to disable svp64 on commandli...
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commitdiff
2021-03-08
Luke Kenneth Casso...
add option in TestRunner to disable svp64 via commandli...
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commitdiff
2021-03-08
Luke Kenneth Casso...
add option to cut out SVP64 from PowerDecoder2
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commitdiff
2021-03-08
Luke Kenneth Casso...
correct comments in sv.add rc=1
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commitdiff
2021-03-08
Cesar Strauss
Remove the unused internal insn_done signal
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commitdiff
2021-03-08
Cesar Strauss
Fix argument order to match function declaration
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commitdiff
2021-03-07
Cesar Strauss
Fix missing NIA update on ISACaller
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commitdiff
2021-03-07
Tobias Platen
RADIX: read SPRs
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commitdiff
2021-03-07
Tobias Platen
RADIX: implement memassign and call
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commitdiff
2021-03-07
Luke Kenneth Casso...
add SVSTATE read to DMI interface
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commitdiff
2021-03-07
Cesar Strauss
Merge WAIT_RESET into INSN_FETCH on the Issue FSM
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commitdiff
2021-03-07
Luke Kenneth Casso...
move DMI stuff to separate function in issuer.py
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commitdiff
2021-03-07
Luke Kenneth Casso...
update comments in issuer.py
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commitdiff
2021-03-07
Luke Kenneth Casso...
add Rc=1 SVP64 unit test to svp64_cases.py
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commitdiff
2021-03-07
Cesar Strauss
Implement the VL==0 loop
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commitdiff
2021-03-06
Cesar Strauss
Allow updating the PC and SVSTATE registers while stopped
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commitdiff
2021-03-06
Cesar Strauss
Enable the Simple-V loop test case
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commitdiff
2021-03-06
Cesar Strauss
Begin to implement the Simple-V loop
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commitdiff
2021-03-06
Cesar Strauss
Do not reset pc_changed and sv_changed at instruction end
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commitdiff
2021-03-06
Cesar Strauss
Make the raw opcode input port of the decoder stay...
tree
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commitdiff
2021-03-06
Luke Kenneth Casso...
remove blackbox attribute on SPBlock_512W64B8W
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commitdiff
2021-03-06
Luke Kenneth Casso...
add SPBlock_512W64B8W.v blackbox file
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commitdiff
2021-03-05
Luke Kenneth Casso...
remove sram4k wishbone bte/cti in litex interconnect
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commitdiff
2021-03-05
Luke Kenneth Casso...
litex expects wishbone "err" signals even if not used
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commitdiff
2021-03-05
Luke Kenneth Casso...
extend name of sram4k block with _wb suffix
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commitdiff
2021-03-05
Tobias Platen
unit test: pass bool mmu
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commitdiff
2021-03-05
Luke Kenneth Casso...
add comments and more stub functions
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commitdiff
2021-03-05
Luke Kenneth Casso...
add segment_check function, plus quick test.
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commitdiff
2021-03-05
Luke Kenneth Casso...
add decode_prte function to RADIX
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commitdiff
2021-03-05
Luke Kenneth Casso...
add trivial LD/ST redirectors into RADIX ISACaller
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commitdiff
2021-03-05
Cesar Strauss
Move writing of the PC state register to the issue FSM
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commitdiff
2021-03-05
Cesar Strauss
Move the wait on "core stop" out of fetch, and into...
tree
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commitdiff
2021-03-04
Luke Kenneth Casso...
whitespace
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commitdiff
2021-03-04
Tobias Platen
update test_caller_radix.py
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commitdiff
2021-03-04
Tobias Platen
ISACaller: add option mmu
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commitdiff
2021-03-04
Luke Kenneth Casso...
whoops microwatt already allocates SPR 720
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commitdiff
2021-03-04
Luke Kenneth Casso...
add comments from gem5-experimental mmu
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commitdiff
2021-03-04
Luke Kenneth Casso...
add cached pgtbl0/3
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commitdiff
2021-03-04
Luke Kenneth Casso...
add two functions for checking permissions, to be based...
tree
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commitdiff
2021-03-03
Tobias Platen
add RADIX skeleton and unit test
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commitdiff
2021-03-03
Luke Kenneth Casso...
add debug strings
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commitdiff
2021-03-03
Luke Kenneth Casso...
remove singleton pattern
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commitdiff
2021-03-03
Luke Kenneth Casso...
cur_state is a global, does not have to be passed as...
tree
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commitdiff
2021-03-03
Luke Kenneth Casso...
set SVSTATE in TestRunner using new TestIssuer.svstate_i
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commitdiff
2021-03-03
Luke Kenneth Casso...
add svstate_i to TestIssuer which mirrors pc_i
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commitdiff
2021-03-02
Luke Kenneth Casso...
comment out changing SPR 720 because 720 is not support...
tree
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commitdiff
2021-03-02
Luke Kenneth Casso...
sort out SPR setting in MMU
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commitdiff
2021-03-02
Luke Kenneth Casso...
operating correctly, not directing MMU SPRs to SPR...
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commitdiff
2021-03-02
Luke Kenneth Casso...
must always set ok for writing out data otherwise it...
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commitdiff
2021-03-01
Luke Kenneth Casso...
Revert "fix Bug 607 - unnecessary code added related...
tree
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commitdiff
2021-03-01
Luke Kenneth Casso...
move SVP64 RM decoder to separate module
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commitdiff
2021-02-28
Luke Kenneth Casso...
add additional SVP64 RM decode fields
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commitdiff
2021-02-28
Luke Kenneth Casso...
start on SVP64 RM Mode decoder
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commitdiff
2021-02-28
Luke Kenneth Casso...
more SVP64 enums
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commitdiff
2021-02-28
Luke Kenneth Casso...
add SVP64 RM sub-field enums
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commitdiff
2021-02-28
Luke Kenneth Casso...
move SVP64 Extra decoders to separate module
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commitdiff
2021-02-28
Luke Kenneth Casso...
fix syntax error
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commitdiff
2021-02-28
Luke Kenneth Casso...
move SVP64PrefixDecoder to separate module
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commitdiff
2021-02-28
Luke Kenneth Casso...
add PowerDecoder.no_in_vec
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commitdiff
2021-02-28
Luke Kenneth Casso...
add svp64_instrs to power_svp64
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commitdiff
2021-02-28
Tobias Platen
fix Bug 607 - unnecessary code added related to MMU...
tree
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commitdiff
2021-02-28
Tobias Platen
fix Bug 603 - use SPR names/numbers from sprs.csv
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commitdiff
2021-02-27
Luke Kenneth Casso...
use PowerDecoder2.no_out_vec instead of manual vector...
tree
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commitdiff
2021-02-27
Luke Kenneth Casso...
add corresponding VL=0 unit test as from 161b7d67b...
tree
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commitdiff
2021-02-27
Cesar Strauss
Add traces for the new FSM
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commitdiff
2021-02-26
Cesar Strauss
Add a vector case with VL == 0
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commitdiff
2021-02-26
Luke Kenneth Casso...
comment on CoreState
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commitdiff
2021-02-26
Luke Kenneth Casso...
remove sv_changed input to fetch_fsm, add it to issue_f...
tree
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commitdiff
2021-02-26
Luke Kenneth Casso...
moving new_svstate and update_svstate into issue FSM...
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commitdiff
2021-02-26
Luke Kenneth Casso...
move fetch_insn_o into issue_fsm TestIssuer
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commitdiff
2021-02-26
Luke Kenneth Casso...
add comments, missing that VL loop ends after execution...
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commitdiff
2021-02-26
Cesar Strauss
Implement a decode/issue FSM between fetch and execute
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commitdiff
2021-02-24
Tobias Platen
wb_get: write outputs to seperate logfile too
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commitdiff
2021-02-24
Tobias Platen
update mmu testcase
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commitdiff
2021-02-24
Tobias Platen
test_runner.py: add needed imports
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commitdiff
2021-02-24
Luke Kenneth Casso...
add comments explaining split
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commitdiff
2021-02-24
Luke Kenneth Casso...
move DecodeCROut/In (at last) out of PowerDecoderSubset...
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commitdiff
2021-02-24
Luke Kenneth Casso...
start making write_cr0 independent of DecodeCROut
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commitdiff
2021-02-23
Tobias Platen
deduplicate
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commitdiff
2021-02-23
Luke Kenneth Casso...
add note that SVSTATE has changed, this will allow...
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commitdiff
2021-02-22
Cesar Strauss
Fix typo when calculating PowerDecoder2.no_out_vec
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commitdiff
2021-02-22
Luke Kenneth Casso...
move setting of NIA into fetch FSM in TestIssuer
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commitdiff
2021-02-22
Luke Kenneth Casso...
whoops
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commitdiff
2021-02-22
Luke Kenneth Casso...
moving PC-setting (NIA) out of execute_fsm in TestIssuer
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commitdiff
2021-02-22
Luke Kenneth Casso...
rename inter-FSM handshake signals in TestIssuer
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commitdiff
2021-02-21
Luke Kenneth Casso...
err trying to put in some FSM handshake signals, gettin...
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commitdiff
2021-02-21
Luke Kenneth Casso...
comment for where SVSTATE FSM should go
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commitdiff
2021-02-21
Luke Kenneth Casso...
add CR out vector detection to PowerDecoder2 no_out_vec
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commitdiff
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