move common functionality between PipeSpecs to soc.fu.pipe_data
[soc.git] / src / soc / fu /
2020-05-21 Luke Kenneth Casso... move common functionality between PipeSpecs to soc...
2020-05-21 Luke Kenneth Casso... move FU IntegerData to directory below
2020-05-21 Luke Kenneth Casso... branch output spec nia not cia
2020-05-21 Luke Kenneth Casso... add dedicated TrapPipeSpec
2020-05-21 Luke Kenneth Casso... create and use ShiftRotPipeSpec
2020-05-21 Luke Kenneth Casso... convert to individual PipeSpecs for each pipeline
2020-05-21 Luke Kenneth Casso... add regspec to ALUPipeSpec
2020-05-21 Luke Kenneth Casso... use branch-specific data structures, add "regspecs...
2020-05-20 Michael NolanAdd proof for OP_MCRF
2020-05-20 Michael NolanAdd proof for OP_MFCR
2020-05-20 Michael NolanMake test for bpermd exercise the module a bit more
2020-05-20 Michael NolanRevert "*technically* don't use a full crossbar"
2020-05-20 Luke Kenneth Casso... add link to bugreport in CR pipe formal test
2020-05-20 Michael Nolan*technically* don't use a full crossbar
2020-05-20 colepoirierAdded OP_BPERMD to fu/logical pipeline, with test
2020-05-20 Michael NolanRevert "assign index to temporary"
2020-05-20 Michael NolanAdd proof for OP_CROP
2020-05-20 Luke Kenneth Casso... go back to not using LUT in CR pipe
2020-05-20 Luke Kenneth Casso... assign index to temporary
2020-05-20 Luke Kenneth Casso... store CR lut result in temporary
2020-05-20 Michael NolanBegin adding CR proof
2020-05-20 Michael NolanFix small bug in op_crop
2020-05-20 Luke Kenneth Casso... add register specs to pipeline in/out so that they...
2020-05-20 Luke Kenneth Casso... damn. assigning to temporary signals may turn out...
2020-05-20 Luke Kenneth Casso... ehn? moo? CR test_pipe_caller locks up 100% CPU on...
2020-05-20 Luke Kenneth Casso... correct XER variable names
2020-05-20 Luke Kenneth Casso... correct import on shift_rot maskgen
2020-05-20 Michael NolanUse overflow definition from microwatt
2020-05-20 Michael NolanAdd overflow handling and proof
2020-05-20 Michael NolanFix bug introduced in rebase
2020-05-20 Luke Kenneth Casso... fixup XER names in shift_rot pipe tests
2020-05-20 Luke Kenneth Casso... formal proof rename on XER flags
2020-05-20 Luke Kenneth Casso... update to new names for XER fields
2020-05-20 Luke Kenneth Casso... normalise XER regs carry/32 and SO
2020-05-20 Michael NolanAdd proof for OP_CNTZ
2020-05-20 Luke Kenneth Casso... add cross-reference to bugtracker and wiki
2020-05-20 Michael NolanAdd test for edge cases that were previously buggy
2020-05-20 Michael NolanDelete assume left over from testing
2020-05-20 Michael NolanAdd proof for OP_PRTY
2020-05-20 Michael NolanFormally verify OP_POPCNT
2020-05-20 Michael NolanFix bug with popcntd
2020-05-20 Luke Kenneth Casso... whitespace, rename ilang to alu_main_stage.il
2020-05-20 Luke Kenneth Casso... i seem to like short names that happen to make things...
2020-05-20 Michael NolanAdd proof for OP_CMP and OP_CMPEQB
2020-05-20 Michael NolanAdd proof for OP_EXTS
2020-05-20 Michael NolanAdd 32 bit carry handling to alu
2020-05-20 Luke Kenneth Casso... output ilang for ALU to unique file
2020-05-20 Luke Kenneth Casso... use nmutil exts helper in ALU OP_EXTS
2020-05-20 Luke Kenneth Casso... use nmutil exts helper
2020-05-20 Luke Kenneth Casso... munge / simplify code
2020-05-20 Luke Kenneth Casso... minor code-munge, use shorter names
2020-05-20 Luke Kenneth Casso... convert shift_rot to use XER Data
2020-05-20 Luke Kenneth Casso... convert Logical to use new XER use of Data()
2020-05-20 Luke Kenneth Casso... convert alu output to use Data for XER and CR0
2020-05-20 Luke Kenneth Casso... whoops changed name of ALUInputData to LogicalInputData
2020-05-19 Luke Kenneth Casso... output ilang to branch_pipeline.il for branch
2020-05-19 Luke Kenneth Casso... use field AA directly
2020-05-19 Luke Kenneth Casso... remove SPR3 from Branch Data, rename lr and spr to...
2020-05-19 colepoirierRenamed bperm files in fu/logical and fu/logical formal...
2020-05-19 Luke Kenneth Casso... rename module, remove extraneous code and imports
2020-05-19 Luke Kenneth Casso... hmmm, branch sets nia to Data as well and sets nia...
2020-05-19 Luke Kenneth Casso... whitespace
2020-05-19 Luke Kenneth Casso... use Data on SPRs in Trap InputData just like in BranchO...
2020-05-19 Luke Kenneth Casso... code-munge
2020-05-19 Luke Kenneth Casso... update comments
2020-05-19 Michael NolanAdd should_trap signal to trap output data
2020-05-19 Michael NolanAdd trap main stage
2020-05-19 Michael NolanBegin adding trap FU
2020-05-19 Luke Kenneth Casso... rename ALUPipeData to LogicalPipeData
2020-05-19 Luke Kenneth Casso... annoying syntax error
2020-05-19 Luke Kenneth Casso... code-shuffle on OP_CNTZ
2020-05-19 Michael NolanImplement 32 bit cntlz and cnttz
2020-05-19 Michael NolanActually implement cntlzd
2020-05-19 Michael NolanHandle carry out in alu
2020-05-19 Luke Kenneth Casso... 32-bit testing of output for CR0 conditions
2020-05-19 colepoirierAdded luke's suggested code to cover all 3 assertions...
2020-05-18 colepoirierAdded 2nd of 3 assertions for proof_bperm.py, currently...
2020-05-18 Luke Kenneth Casso... move countzero to fu/logical
2020-05-18 Luke Kenneth Casso... fix countzero import on test
2020-05-18 Luke Kenneth Casso... correct import after soc.fu move
2020-05-18 Luke Kenneth Casso... dumb syntax error
2020-05-18 Luke Kenneth Casso... mass-rename of modules to soc.fu.*
2020-05-18 Luke Kenneth Casso... rename pipe to fu