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move over to openpower-isa repo
[soc.git] / src /
2021-04-23 Luke Kenneth Casso... move over to openpower-isa repo tree | commitdiff
2021-04-23 Luke Kenneth Casso... move over to openpower-isa tree | commitdiff
2021-04-23 Luke Kenneth Casso... moving more over to openpower-isa repo tree | commitdiff
2021-04-23 Luke Kenneth Casso... removing more as moved over to openpower-isa tree | commitdiff
2021-04-23 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-22 Luke Kenneth Casso... add debugging and buffering to CacheRam tree | commitdiff
2021-04-22 Luke Kenneth Casso... whitespace tree | commitdiff
2021-04-22 Luke Kenneth Casso... r1.end_row_ix off-by-one in dcache tree | commitdiff
2021-04-22 Luke Kenneth Casso... sync missing in dcache tree | commitdiff
2021-04-22 Luke Kenneth Casso... dcache.py code-comments tree | commitdiff
2021-04-22 Luke Kenneth Casso... cleanup dcache tree | commitdiff
2021-04-22 Luke Kenneth Casso... error using sync, should have been comb tree | commitdiff
2021-04-22 Cesar StraussImplement CR predication tree | commitdiff
2021-04-21 Cesar StraussCR sub-fields are stored in MSB0 order tree | commitdiff
2021-04-21 Luke Kenneth Casso... experimenting with dcache tree | commitdiff
2021-04-21 Tobias Platentestcase: pass PRTBL to mmu tree | commitdiff
2021-04-21 Cesar StraussAdd CR predication test case for TestIssuer tree | commitdiff
2021-04-21 Cesar StraussFix comment in CR predication test case tree | commitdiff
2021-04-21 Cesar StraussFix sense of "invert" signal tree | commitdiff
2021-04-20 Luke Kenneth Casso... add enable MMU option to issuer_verilog.py tree | commitdiff
2021-04-20 Luke Kenneth Casso... cannot pass in arguments to Core - must be done with... tree | commitdiff
2021-04-20 Luke Kenneth Casso... use soc.bus.sram instead of nmigen_soc.wishbone.sram tree | commitdiff
2021-04-20 Luke Kenneth Casso... add wishbone sram.py (move from nmigen-soc) tree | commitdiff
2021-04-19 Luke Kenneth Casso... give independent names to spblock512w64b8ws tree | commitdiff
2021-04-18 Luke Kenneth Casso... give spblock512 a name as a submodule tree | commitdiff
2021-04-18 Luke Kenneth Casso... create signal on test_issuer which gives PLL clk_sel_i... tree | commitdiff
2021-04-18 Luke Kenneth Casso... rename SPBlock_512W64B8W to lowercase tree | commitdiff
2021-04-18 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-18 Luke Kenneth Casso... rename PLL pins to match LIP6.fr PLL tree | commitdiff
2021-04-18 Luke Kenneth Casso... core_stopped_i unused: remove tree | commitdiff
2021-04-18 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-18 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-17 Luke Kenneth Casso... experiment with alternative PID in radix mmu tree | commitdiff
2021-04-17 Luke Kenneth Casso... pass in SPRs each time on radix test tree | commitdiff
2021-04-17 Luke Kenneth Casso... add LD/ST radix unit test tree | commitdiff
2021-04-17 Cesar StraussImplement 1<<r3 directly by a shift tree | commitdiff
2021-04-17 Tobias Platenradixmmu: fix my mistake about pgbase size tree | commitdiff
2021-04-16 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-16 Luke Kenneth Casso... jtag utils, send tms before tck tree | commitdiff
2021-04-16 Tobias Platenpass the "old" value of shift to _new_lookup tree | commitdiff
2021-04-16 Luke Kenneth Casso... sigh, new_shift wrong bitwidth tree | commitdiff
2021-04-16 Luke Kenneth Casso... put mbits back into segment_check (like it is in microwatt) tree | commitdiff
2021-04-16 Luke Kenneth Casso... radixmmu cleanup tree | commitdiff
2021-04-16 Luke Kenneth Casso... call addrshift and get_pgtable_addr inside while loop... tree | commitdiff
2021-04-16 Luke Kenneth Casso... code-cleanup in radixmmu tree | commitdiff
2021-04-15 Luke Kenneth Casso... whitespace and corrections to NLS, RTS1, RTS2 tree | commitdiff
2021-04-15 Tobias Platenfix radix testcase tree | commitdiff
2021-04-15 Luke Kenneth Casso... concat en_sigs together in JTAG to make sure they are... tree | commitdiff
2021-04-15 Luke Kenneth Casso... add icachemmu option to ISACaller tree | commitdiff
2021-04-14 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-14 Luke Kenneth Casso... whitespace tree | commitdiff
2021-04-14 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-14 Tobias Platenupdate test_caller_radix.py tree | commitdiff
2021-04-14 Tobias Platenradixmmu: handle badtree tree | commitdiff
2021-04-14 Tobias Platenupdate test case for radix mmu tree | commitdiff
2021-04-14 Tobias Platenradixmmu: error handling tree | commitdiff
2021-04-13 Tobias Platenmore fixes for radixmmu.py tree | commitdiff
2021-04-13 Tobias Platenfix AttributeError in radixmmu testcase tree | commitdiff
2021-04-12 Tobias Platenradixmmu.py: cleanup tree | commitdiff
2021-04-11 Tobias Platenfix bug in radixmmu.py tree | commitdiff
2021-04-11 Tobias Platenradixmmu: more work on segment check tree | commitdiff
2021-04-10 Cesar StraussImplement 1<<r3 predicate mode tree | commitdiff
2021-04-10 Cesar StraussAdd 1<<r3 test cases to TestIssuer tree | commitdiff
2021-04-10 Cesar StraussAdd test cases for 1<<r3 predication tree | commitdiff
2021-04-09 Luke Kenneth Casso... add blinken lights assembly (not used yet) tree | commitdiff
2021-04-09 Luke Kenneth Casso... test firmware upload program needed to branch back... tree | commitdiff
2021-04-08 Luke Kenneth Casso... sort out pc reset when DMI interface requests reset tree | commitdiff
2021-04-08 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-08 Luke Kenneth Casso... argh, wb jtag stall probably is not working tree | commitdiff
2021-04-08 Luke Kenneth Casso... upload over 32-bit JTAG Wishbone tree | commitdiff
2021-04-08 Luke Kenneth Casso... shrink JTAG master bus to 32-bit (match with litex) tree | commitdiff
2021-04-07 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-07 Tobias PlatenWIP: calculate address of first page table entry tree | commitdiff
2021-04-07 Tobias Platenradixmmu: fix segment_check function and its caller tree | commitdiff
2021-04-06 Luke Kenneth Casso... 4k SRAM Instance needs write-enable @ 8-bit width tree | commitdiff
2021-04-06 Luke Kenneth Casso... 8-bit granularity on JTAG wishbone tree | commitdiff
2021-04-06 Luke Kenneth Casso... remove unneeded code tree | commitdiff
2021-04-06 Staf Verhaegensoc-cocotb-sim submodule update tree | commitdiff
2021-04-06 Tobias Platenadd mmu_states.dia tree | commitdiff
2021-04-06 Luke Kenneth Casso... git submodule update tree | commitdiff
2021-04-06 Cesar StraussMake the VL loop reentrant in HDL tree | commitdiff
2021-04-06 Cesar StraussAdd a HDL test case, where we start at the middle of... tree | commitdiff
2021-04-06 Cesar StraussStart the test case from a point where the predicate... tree | commitdiff
2021-04-05 Luke Kenneth Casso... litex submodule update tree | commitdiff
2021-04-05 Luke Kenneth Casso... submodule update tree | commitdiff
2021-04-04 Staf Verhaegensoc-cocotb-sim submodule update tree | commitdiff
2021-04-04 Cesar StraussAdd test case for reentrant VL loop tree | commitdiff
2021-04-03 Cesar StraussReminder for a possible hardware optimization tree | commitdiff
2021-04-03 Cesar StraussBe more precise when using a one-bit constant tree | commitdiff
2021-04-03 Cesar StraussFix typo tree | commitdiff
2021-04-03 Cesar StraussAdd test case with all mask bits equal to zero tree | commitdiff
2021-04-03 Cesar StraussAdd a test case for integer single predication tree | commitdiff
2021-04-03 Cesar StraussDisallow unknown encmodes in SVP64 Assembly tree | commitdiff
2021-04-03 Cesar StraussEnable remaining disabled test cases tree | commitdiff
2021-04-03 Cesar StraussAllow the Simulator to handle back-to-back signaling... tree | commitdiff
2021-04-03 Cesar StraussSignal the simulator when completing a VL loop tree | commitdiff
2021-04-03 Cesar StraussFix typo tree | commitdiff
2021-04-03 Cesar StraussAdd twin predication test tree | commitdiff
2021-04-02 Cesar StraussEnd VL loop as soon as either src/dst step reaches VL tree | commitdiff
2021-04-02 Cesar StraussFix typo tree | commitdiff
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