use --recursive on git submodule not --remote - one does a "latest update"
[soclayout.git] / experiments9 / non_generated /
2021-06-10 Luke Kenneth Casso... reverse pingroup SDRAM address to get it closer to...
2021-06-10 Luke Kenneth Casso... redo pinmux, mirror image some pins
2021-06-10 Luke Kenneth Casso... add spimaster to peripheral system, all names changed...
2021-06-10 Luke Kenneth Casso... updated non_generated pinmap json file
2021-06-10 Luke Kenneth Casso... updated non_generated pinmap json file
2021-06-09 Luke Kenneth Casso... add litex pinpads JSON file to nongenerated
2021-06-09 Luke Kenneth Casso... doh, should have reduced NC by 16
2021-06-09 Luke Kenneth Casso... pll24_i renamed to clk_24_i
2021-06-09 Luke Kenneth Casso... pllclk_o is renamed to pllclk_clk
2021-06-09 Luke Kenneth Casso... use sys_pllclk_from_pad not sys_clk_from_pad
2021-06-09 Luke Kenneth Casso... reorg of PLL, routed out into peripheral interconnect
2021-06-04 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-06-03 Luke Kenneth Casso... rename sys_clk to sys_clk_0 and rename ref_clk to sys_clk
2021-06-03 Staf VerhaegenReroute clk so PLL output clock is used as sys_clk.
2021-06-03 Staf VerhaegenDuplicate file before patching for clock rerouting.
2021-06-03 Luke Kenneth Casso... update libresoc.v to use sys_clk for main core
2021-06-03 Luke Kenneth Casso... change ref to ref_v in PLL (keyword)
2021-05-27 Luke Kenneth Casso... update libresoc.v
2021-05-26 Luke Kenneth Casso... clk_sel_i in TestIssuer was one bit not 2
2021-05-26 Luke Kenneth Casso... remove sram4k wb err (unused anyway)
2021-05-25 Luke Kenneth Casso... increase not-connected pads by one
2021-05-25 Luke Kenneth Casso... rename PLL out to out_v in test_issuer
2021-05-25 Luke Kenneth Casso... rename pll blackbox out to out_v
2021-05-24 Luke Kenneth Casso... disappearing signal from pll, attempt to get it back
2021-05-24 Luke Kenneth Casso... rename cell to "real_pll" to avoid conflict with cell...
2021-05-22 Luke Kenneth Casso... correct PLL names
2021-05-22 Luke Kenneth Casso... re-add 4k sram
2021-05-22 Luke Kenneth Casso... annoying rename of pll analog pin
2021-05-22 Luke Kenneth Casso... manually rename ls180sram4k module to ls180
2021-05-22 Luke Kenneth Casso... update PLL to use submodule Instance
2021-04-30 Luke Kenneth Casso... enabling experiments9 new LibreSOCMem fake blackbox...
2021-04-30 Luke Kenneth Casso... using renamed (single) spblock_512w64b8w
2021-04-28 Luke Kenneth Casso... name everything back to spblock_512w64b8w now that...
2021-04-28 Luke Kenneth Casso... rename spblock modules to just straight spblock_512w64b...
2021-04-28 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-04-28 Luke Kenneth Casso... add vbe spblock models to non_generated and build scripts
2021-04-28 Luke Kenneth Casso... shrinking regfile sizes some more
2021-04-27 Luke Kenneth Casso... add blackbox attribute to spblock512*.v
2021-04-18 Luke Kenneth Casso... argh, found the blackbox problem: yosys is "doing the...
2021-04-18 Luke Kenneth Casso... try renaming spblock without the underscore
2021-04-18 Luke Kenneth Casso... try changing layout of blackbox spblock_512w64b8w
2021-04-18 Luke Kenneth Casso... rename spblock_512w64b8w, and vco_test_ana for pll
2021-04-18 Luke Kenneth Casso... update ls180 sram4k
2021-04-18 Luke Kenneth Casso... sort out adding SPBlock_512 SRAM verilog to ls180
2021-04-18 Luke Kenneth Casso... use correct arguments to litex build to create 4k srams...
2021-04-18 Luke Kenneth Casso... rename ls180sram4k to ls180
2021-04-18 Luke Kenneth Casso... add full core variant including 4k sram of ls180
2021-04-18 Luke Kenneth Casso... update libresoc.v, c4m-jtag fsm was renamed
2021-04-18 Luke Kenneth Casso... update libresoc.v, c4m-jtag fsm was renamed
2021-04-10 Luke Kenneth Casso... use verilog for ls180 instead of ilang
2021-04-01 Luke Kenneth Casso... update / refresh full core DFF
2021-04-01 Luke Kenneth Casso... update / refresh full core DFF
2021-03-30 Luke Kenneth Casso... update 4k SRAM ls180.il
2021-03-29 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-03-29 Luke Kenneth Casso... aaagh found bug in litex setup, 64 bit WB bus was truncated
2021-03-28 Luke Kenneth Casso... reduce SPR regfile size considerably
2021-03-28 Luke Kenneth Casso... reduce INT and FAST regfile sizes by sharing ports
2021-03-27 Luke Kenneth Casso... hooray, corrected pinouts
2021-03-27 Luke Kenneth Casso... really weird error "unsupported direction for eint...
2021-03-22 Luke Kenneth Casso... increase DFF RAM size slightly
2021-03-22 Luke Kenneth Casso... add very small DFF srams variant
2021-03-22 Luke Kenneth Casso... create small dff with 4x 4k SRAMs
2021-03-22 Luke Kenneth Casso... ls180.il update
2021-03-22 Luke Kenneth Casso... argh pinmux generating bi-directional SDR DM when it...
2021-03-18 Luke Kenneth Casso... update ls180.il
2021-03-16 Luke Kenneth Casso... update ls180.il 4ksram with correct sdram connections
2021-03-14 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-03-11 Luke Kenneth Casso... try alternative pad/core connection
2021-03-06 Luke Kenneth Casso... add blackbox SPBlock 4k SRAM module
2021-03-05 Luke Kenneth Casso... remove sram 4k wb bte/cti
2021-03-05 Luke Kenneth Casso... litex expects wishbone "err" signals, added to sram 4k
2021-03-05 Luke Kenneth Casso... rename sram_4k wishbone interface to actually like...
2021-03-03 Luke Kenneth Casso... add blackbox attribute manually to SPBlock_512W64B8W
2021-03-02 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2021-02-20 Luke Kenneth Casso... increase core size to 50000 (DFF SRAMs)
2021-01-27 Jean-Paul ChaputMerge branch 'master' of ssh://libre-riscv.org:922...
2020-12-04 Luke Kenneth Casso... Revert "very weird bug where CoreToChip.buildChip canno...
2020-12-03 Luke Kenneth Casso... very weird bug where CoreToChip.buildChip cannot find...
2020-12-03 Luke Kenneth Casso... experiment adding 3x extra SRAMs back in but still...
2020-12-03 Luke Kenneth Casso... wtf does 32/64 bit bus have to do with gpio_o(8) disapp...
2020-12-03 Luke Kenneth Casso... reduce mem width due to yosys bugs. sigh
2020-12-03 Luke Kenneth Casso... added 3 more 4k SRAMs
2020-12-02 Luke Kenneth Casso... add full core back in
2020-11-14 Luke Kenneth Casso... update ls180 litex interfaces
2020-11-14 Luke Kenneth Casso... get rid of ibus/dbus/xics advanced wishbone tags
2020-11-14 Luke Kenneth Casso... update litex direction of iopads in ls180
2020-11-13 Luke Kenneth Casso... reduce nc ls180 pins to match
2020-11-13 Luke Kenneth Casso... fix clk_sel width (2 not 3)
2020-11-13 Luke Kenneth Casso... trying to get yosys to stop destroying pll_lck_o signal
2020-11-13 Luke Kenneth Casso... trying to get yosys to stop destroying pll_lck_o signal
2020-11-13 Luke Kenneth Casso... update full core ls180 (actually with litex peripherals...
2020-11-12 Luke Kenneth Casso... remove niolib io_in/out signal, no longer needed
2020-11-11 Luke Kenneth Casso... update CLKSEL / PLLOCK pins for ls180
2020-11-08 Luke Kenneth Casso... start conversion of ls180 to new niolib
2020-11-07 Luke Kenneth Casso... add io_in/io_out zero/one to help transition to new...
2020-11-07 Luke Kenneth Casso... messing about to get non_generated ls180.vst running...
2020-11-07 Luke Kenneth Casso... update full ls180 core
2020-10-04 Luke Kenneth Casso... match up power/gnd numbers with pinmux
2020-10-04 Luke Kenneth Casso... reduce number of not-connected
2020-10-02 Luke Kenneth Casso... add really cut down version of ls180.vst
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