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add CR read to DMI interface
[soc.git] / src / soc / simple /
2020-08-25 Luke Kenneth Casso... add CR read to DMI interface tree | commitdiff
2020-08-24 Luke Kenneth Casso... add isel CR tests to run on qemu (confirmed working) tree | commitdiff
2020-08-24 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-23 Luke Kenneth Casso... bring "core stopped" signal out through DMI interface tree | commitdiff
2020-08-21 Luke Kenneth Casso... testing 64-bit wishbone bus after 32-bit *still* fails... tree | commitdiff
2020-08-21 Luke Kenneth Casso... get litex sim enabled with 32-bit wishbone bus tree | commitdiff
2020-08-16 Luke Kenneth Casso... attempting to track down bug in litex bios memtest tree | commitdiff
2020-08-16 Luke Kenneth Casso... read delay on getting regfile data tree | commitdiff
2020-08-15 Luke Kenneth Casso... rather big change to interaction between regfile and... tree | commitdiff
2020-08-14 Luke Kenneth Casso... ha! "state" (pc, msr) not properly passed to core tree | commitdiff
2020-08-14 Luke Kenneth Casso... drop in insn_state synchronously in issuer, at same... tree | commitdiff
2020-08-14 Luke Kenneth Casso... finally, fix decoder combinatorial loop tree | commitdiff
2020-08-14 Luke Kenneth Casso... sync up the core decode-execute state, tree | commitdiff
2020-08-14 Luke Kenneth Casso... move instruction decoder out of core tree | commitdiff
2020-08-14 Luke Kenneth Casso... move regspec / rdflag decoding functions out of PowerDe... tree | commitdiff
2020-08-14 Luke Kenneth Casso... sort out instruction stop/cancel when adding a new... tree | commitdiff
2020-08-14 Luke Kenneth Casso... put multi-ports back (for read) on int and fast regfiles tree | commitdiff
2020-08-13 Luke Kenneth Casso... fix dmi reg read tree | commitdiff
2020-08-13 Luke Kenneth Casso... sync on pc writing when changed tree | commitdiff
2020-08-13 Luke Kenneth Casso... sync on read of regfile ports tree | commitdiff
2020-08-13 Luke Kenneth Casso... sigh. convert INT regfile to binary addressing tree | commitdiff
2020-08-11 Luke Kenneth Casso... sigh, remove yet another int regfile read port tree | commitdiff
2020-08-11 Luke Kenneth Casso... massive reduction in gate count by using alternative... tree | commitdiff
2020-08-11 Luke Kenneth Casso... reduce regfile port usage for INT and FAST tree | commitdiff
2020-08-11 Luke Kenneth Casso... prepare write ports to be shared tree | commitdiff
2020-08-11 Luke Kenneth Casso... move write regfile picker creation to new function tree | commitdiff
2020-08-11 Luke Kenneth Casso... reduce regfile ports by creating separate STATE regfile tree | commitdiff
2020-08-11 Luke Kenneth Casso... reducing regfile port usage by sharing read ports tree | commitdiff
2020-08-10 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-09 Luke Kenneth Casso... write pulse in issuer tree | commitdiff
2020-08-09 Luke Kenneth Casso... fix combinatorial loop in ldst compunit tree | commitdiff
2020-08-09 Luke Kenneth Casso... use rising edge detection on st go_i/rel_o tree | commitdiff
2020-08-09 Luke Kenneth Casso... add logical test issuer case tree | commitdiff
2020-08-09 Luke Kenneth Casso... get rid of MSR read combinatorial loop tree | commitdiff
2020-08-09 Luke Kenneth Casso... delay go_st by one cycle, break combinatorial loop tree | commitdiff
2020-08-05 Cole PoirierMerge branch 'master' of git.libre-soc.org:soc tree | commitdiff
2020-08-05 Luke Kenneth Casso... add div test cases into test_issuer.py tree | commitdiff
2020-08-05 Luke Kenneth Casso... add div FSM as default for test_issuer in verilog and... tree | commitdiff
2020-08-04 Luke Kenneth Casso... read/set pc outside of FSM so that DMI interface can... tree | commitdiff
2020-08-04 Luke Kenneth Casso... whoops must output NIA not PC to debug DMI query in... tree | commitdiff
2020-08-04 Luke Kenneth Casso... allow instruction to run if initiated whilst "stopped... tree | commitdiff
2020-08-04 Luke Kenneth Casso... add DMI debug interface to libresoc litex sim tree | commitdiff
2020-08-03 Luke Kenneth Casso... add quick demo/test of reading DMI reg 9 tree | commitdiff
2020-08-03 Luke Kenneth Casso... pass state (MSR/PC) around between PowerDecode2, DMI... tree | commitdiff
2020-08-03 Luke Kenneth Casso... use new soc.config.state CoreState class in DMI and... tree | commitdiff
2020-08-03 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2020-08-03 Luke Kenneth Casso... change over to DMI debug start/stop interface tree | commitdiff
2020-07-31 Luke Kenneth Casso... restrict external port list further in test_issuer tree | commitdiff
2020-07-30 Luke Kenneth Casso... core_start/stop/endian were inverted (output) tree | commitdiff
2020-07-30 Luke Kenneth Casso... ha! have to explicitly specify the ports when writing... tree | commitdiff
2020-07-29 Luke Kenneth Casso... bit of a big change: add prefixes "cu_" to all CompUnit... tree | commitdiff
2020-07-29 Jacob Lifshayadd __init__.py to all source directories tree | commitdiff
2020-07-29 Jacob Lifshayformat some tests tree | commitdiff
2020-07-26 Luke Kenneth Casso... add nop test cases tree | commitdiff
2020-07-26 Luke Kenneth Casso... activate some of new accumulator-based tests in test_issuer tree | commitdiff
2020-07-23 Luke Kenneth Casso... support 32-bit mem width setting tree | commitdiff
2020-07-23 Luke Kenneth Casso... allow imem to be 64/32 bit wide tree | commitdiff
2020-07-23 Luke Kenneth Casso... begin core in running state tree | commitdiff
2020-07-22 Jacob LifshayMerge remote-tracking branch 'origin/master' tree | commitdiff
2020-07-22 Jacob Lifshayformat code tree | commitdiff
2020-07-22 Luke Kenneth Casso... missing ports from issuer, when doing verilog tree | commitdiff
2020-07-22 Luke Kenneth Casso... reduce number of FastRegs read ports tree | commitdiff
2020-07-21 Luke Kenneth Casso... add PC (CIA) to PowerDecode2 "state" for passing into... tree | commitdiff
2020-07-19 Luke Kenneth Casso... do not start core in terminated mode tree | commitdiff
2020-07-19 Luke Kenneth Casso... explicitly set up a pc_i_ok signal in test_microwatt.py tree | commitdiff
2020-07-19 Luke Kenneth Casso... expose core_stop_i to outside as well tree | commitdiff
2020-07-19 Luke Kenneth Casso... set go_insn_i to non-resetless tree | commitdiff
2020-07-19 Luke Kenneth Casso... add issuer verilog generator tree | commitdiff
2020-07-19 Luke Kenneth Casso... update to expose signals at top-level of issuer tree | commitdiff
2020-07-19 Luke Kenneth Casso... add DivTestCase to test_issuer.py (commented out for... tree | commitdiff
2020-07-18 Luke Kenneth Casso... add option to generate verilog tree | commitdiff
2020-07-14 Luke Kenneth Casso... add MSR reading to issue FSM tree | commitdiff
2020-07-12 Luke Kenneth Casso... rename InternalOp to MicrOp tree | commitdiff
2020-07-12 Luke Kenneth Casso... add OP_ATTN test back in tree | commitdiff
2020-07-12 Luke Kenneth Casso... exit FSM when termination detected tree | commitdiff
2020-07-12 Luke Kenneth Casso... code-morph on core connect_instruction tree | commitdiff
2020-07-12 Luke Kenneth Casso... msb of instruction causing sign-overflow tree | commitdiff
2020-07-11 Luke Kenneth Casso... sort out core write latching: gate by busy, and use... tree | commitdiff
2020-07-11 Luke Kenneth Casso... * clarifying core function unit enable tree | commitdiff
2020-07-11 Luke Kenneth Casso... fix spr setting, set endianness tree | commitdiff
2020-07-11 Luke Kenneth Casso... more setting bigendian tree | commitdiff
2020-07-11 Luke Kenneth Casso... add bigendian mode to helloworld test tree | commitdiff
2020-07-08 Luke Kenneth Casso... resolving bigendian/littleendian modes in qemu sim tree | commitdiff
2020-07-08 Luke Kenneth Casso... resolving old and new behaviour for lookup of SPRs tree | commitdiff
2020-07-08 Luke Kenneth Casso... resolving old and new behaviour for lookup of SPRs tree | commitdiff
2020-07-08 Luke Kenneth Casso... adding in ALU test back in, debugging SPR setup tree | commitdiff
2020-07-08 Luke Kenneth Casso... sorting out setting of XER tree | commitdiff
2020-07-08 Luke Kenneth Casso... got test_issuer operational on one unit test tree | commitdiff
2020-07-08 Luke Kenneth Casso... stashing current state of investigation whilst looking... tree | commitdiff
2020-07-08 Luke Kenneth Casso... copy binary loaded from disk into data memory as well tree | commitdiff
2020-07-08 Jacob LifshayMerge branch 'master' of ssh://git.libre-riscv.org... tree | commitdiff
2020-07-07 Luke Kenneth Casso... add hello world binary test tree | commitdiff
2020-07-07 Luke Kenneth Casso... sort-of got binary execution test working tree | commitdiff
2020-07-07 Luke Kenneth Casso... code-shuffle on testing to prepare loading large files... tree | commitdiff
2020-07-07 Luke Kenneth Casso... ordering of tests for OP_ATTN needed shuffling. seems... tree | commitdiff
2020-07-07 Luke Kenneth Casso... debugging termination (OP_ATTN) tree | commitdiff
2020-07-07 Luke Kenneth Casso... update opcode map for OP_ATTN tree | commitdiff
2020-07-07 Luke Kenneth Casso... debugging termination / OP_ATTN tree | commitdiff
2020-07-07 Luke Kenneth Casso... add core start/stop capability, and OP_ATTN support tree | commitdiff
2020-07-07 Luke Kenneth Casso... add in SPR test cases into test_issuer.py tree | commitdiff
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