| 2022-01-16 |
Luke Kenneth Casso... | raise interrupt on misaligned atomic LDST |
tree | commitdiff |
| 2022-01-16 |
Luke Kenneth Casso... | pass over store_done correctly from dcache over PortInt... |
tree | commitdiff |
| 2022-01-16 |
Luke Kenneth Casso... | add CR0 to LDSTCompUnit, for reporting if LR/SC store... |
tree | commitdiff |
| 2022-01-15 |
Luke Kenneth Casso... | pass over atomic signals to dcache from loadstore. |
tree | commitdiff |
| 2022-01-15 |
Luke Kenneth Casso... | pass atomic reserve through from PortInterface to DCache |
tree | commitdiff |
| 2022-01-15 |
Luke Kenneth Casso... | add reserve (atomic) signal to LDST data structures... |
tree | commitdiff |
| 2022-01-12 |
Luke Kenneth Casso... | fix issue with priv_mode not being passed correctly... |
tree | commitdiff |
| 2022-01-10 |
Luke Kenneth Casso... | LoadStore1 priv_mode was not being correctly picked... |
tree | commitdiff |
| 2022-01-09 |
Luke Kenneth Casso... | add linux-5.7 unit test which showed a silly error: |
tree | commitdiff |
| 2022-01-08 |
Luke Kenneth Casso... | fix MMU lookup after 2nd request (misaligned) by also... |
tree | commitdiff |
| 2022-01-08 |
Luke Kenneth Casso... | do not clear out ldst request after TLB entry is added |
tree | commitdiff |
| 2022-01-08 |
Luke Kenneth Casso... | add a second LD request to dcache which is merged with... |
tree | commitdiff |
| 2022-01-08 |
Luke Kenneth Casso... | start adding in mis-aligned LD/ST support into LoadStore1 |
tree | commitdiff |
| 2022-01-06 |
Luke Kenneth Casso... | add SECOND_REQ state to loadstore.py, not yet implemented |
tree | commitdiff |
| 2022-01-03 |
Luke Kenneth Casso... | adding an extra option to issuer_verilog.py to be able... |
tree | commitdiff |
| 2021-12-30 |
Luke Kenneth Casso... | rename nia to cia in MMU input record and mmu FSM |
tree | commitdiff |
| 2021-12-28 |
Luke Kenneth Casso... | add misaligned mmu.bin test 5 notes: currently LoadStor... |
tree | commitdiff |
| 2021-12-26 |
Luke Kenneth Casso... | rename addr to raddr in LoadStore1 to avoid conflict... |
tree | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | when setting DSISR in LoadStore1 use correct load bit... |
tree | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | use correct X-Form L field in OP_MTMSRD |
tree | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | check problem state in OP_MTMSRD from original reg... |
tree | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | remove unneeded state in LoadStore1 |
tree | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | clear instruction fault on exception WAIT_MMU ACK in... |
tree | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | clear out instr_fault when exception is thrown |
tree | commitdiff |
| 2021-12-22 |
Luke Kenneth Casso... | clear instruction fault on idle/valid in Loadstore1 |
tree | commitdiff |
| 2021-12-21 |
Luke Kenneth Casso... | for each unit test case in test_issuer_mmu_data_path... |
tree | commitdiff |
| 2021-12-21 |
Luke Kenneth Casso... | test_issuer_mmu_data_path.py needs to use wb_get because of |
tree | commitdiff |
| 2021-12-20 |
Luke Kenneth Casso... | unit tests for SPRs when MMU enabled, |
tree | commitdiff |
| 2021-12-18 |
Luke Kenneth Casso... | forgot to connect up I-Cache to MMU |
tree | commitdiff |
| 2021-12-14 |
Luke Kenneth Casso... | get OP_FETCH_FAILED to respond/return an exception... |
tree | commitdiff |
| 2021-12-14 |
Luke Kenneth Casso... | MMU LOOKUP for fetch failed, priv mode is inversion... |
tree | commitdiff |
| 2021-12-14 |
Luke Kenneth Casso... | link MSR.PR into MMU FSM OP_FETCH_FAILED |
tree | commitdiff |
| 2021-12-13 |
Luke Kenneth Casso... | convert LoadStore1 to new msr.pr/dr/sf |
tree | commitdiff |
| 2021-12-13 |
Luke Kenneth Casso... | add msr to MMU Op Subset record |
tree | commitdiff |
| 2021-12-12 |
Luke Kenneth Casso... | delay MMU LOOKUP done by one clock so that the exceptio... |
tree | commitdiff |
| 2021-12-12 |
Luke Kenneth Casso... | bring MMU exception out where AllFunctionUnits (and... |
tree | commitdiff |
| 2021-12-12 |
Luke Kenneth Casso... | bring exception out from MMU FSM, correct "done" |
tree | commitdiff |
| 2021-12-12 |
Luke Kenneth Casso... | add LDSTException output to MMU |
tree | commitdiff |
| 2021-12-11 |
Luke Kenneth Casso... | connect up I-Cache to FetchUnitInterface |
tree | commitdiff |
| 2021-12-10 |
Jacob Lifshay | add ternlogi to shift_rot formal test |
tree | commitdiff |
| 2021-12-10 |
Jacob Lifshay | fix shift_rot formal proof |
tree | commitdiff |
| 2021-12-09 |
Luke Kenneth Casso... | add I-Cache to FSM local variables |
tree | commitdiff |
| 2021-12-09 |
Luke Kenneth Casso... | include SPR.TB in SPR FU |
tree | commitdiff |
| 2021-12-09 |
Jacob Lifshay | add bitmanip tests |
tree | commitdiff |
| 2021-12-09 |
Jacob Lifshay | add CommonPipeSpec.__getattr__ to forward attributes... |
tree | commitdiff |
| 2021-12-09 |
Jacob Lifshay | add parent_pspec everywhere |
tree | commitdiff |
| 2021-12-09 |
Jacob Lifshay | format code |
tree | commitdiff |
| 2021-12-08 |
Luke Kenneth Casso... | add OP_FETCH_FAILED to MMU Function Unit |
tree | commitdiff |
| 2021-12-08 |
Luke Kenneth Casso... | make LoadStore1 intsr_fault a "captured flag" - strictl... |
tree | commitdiff |
| 2021-12-08 |
Luke Kenneth Casso... | remove MSR and add CIA to MMU Input Record |
tree | commitdiff |
| 2021-12-08 |
Luke Kenneth Casso... | add instr_fault to LoadStore1 FSM |
tree | commitdiff |
| 2021-12-08 |
Jacob Lifshay | add comment about draft instructions |
tree | commitdiff |
| 2021-12-08 |
Jacob Lifshay | account for Mock absurdities |
tree | commitdiff |
| 2021-12-07 |
Luke Kenneth Casso... | set separate "iside" signal in LoadStore1 to not confuse it |
tree | commitdiff |
| 2021-12-07 |
Luke Kenneth Casso... | add in I-Cache into LoadStore1 - presently unused ... |
tree | commitdiff |
| 2021-12-07 |
Jacob Lifshay | make bitmanip operations conditional on pspec.draft_bit... |
tree | commitdiff |
| 2021-12-07 |
Jacob Lifshay | format code |
tree | commitdiff |
| 2021-12-07 |
Jacob Lifshay | move rotator mode assignments as requested by lkcl |
tree | commitdiff |
| 2021-12-07 |
Jacob Lifshay | format code |
tree | commitdiff |
| 2021-12-05 |
Luke Kenneth Casso... | code-comments |
tree | commitdiff |
| 2021-12-05 |
Luke Kenneth Casso... | wishbone bus convert on dcache |
tree | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | sigh in MMU FSM use direct access to ldst.dar/dsisr... |
tree | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | put DSISR and DAR publicly accessible in LoadStore1 |
tree | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | whoops fix up exception happened if alignment triggers... |
tree | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | fixing DAR updating from exceptions |
tree | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | MMU lookup DSISR load bit inverted in LoadStore1 |
tree | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | store DAR in LoadStore1 |
tree | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | not busy if excrption occurs on MMU_LOOKUP in loadstore.py |
tree | commitdiff |
| 2021-12-04 |
Luke Kenneth Casso... | add means to update dsisr from MMU FSM. TODO: add a... |
tree | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | priv_mode/virt_mode are set in the request, which is... |
tree | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | in loadstore.py set align_intr from request which comes... |
tree | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | driver conflict on priv_mode and virt_mode, do not... |
tree | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | in loadstore.py, when an exception is done or if the FSM |
tree | commitdiff |
| 2021-12-03 |
Luke Kenneth Casso... | comment out dsisr and dar in mmu FSM for now |
tree | commitdiff |
| 2021-12-02 |
Jacob Lifshay | remove bitmanip fu cuz ternlogi (the only instruction... |
tree | commitdiff |
| 2021-12-02 |
Jacob Lifshay | add ternlogi to shiftrot |
tree | commitdiff |
| 2021-12-02 |
Jacob Lifshay | format code |
tree | commitdiff |
| 2021-12-01 |
Luke Kenneth Casso... | stack of changes to MultiCompUnit to speed it up |
tree | commitdiff |
| 2021-12-01 |
Luke Kenneth Casso... | experimenting with option to shorten MultiCompUnit... |
tree | commitdiff |
| 2021-12-01 |
Luke Kenneth Casso... | create single-stage ALU pipeline, shorten latency on... |
tree | commitdiff |
| 2021-12-01 |
Luke Kenneth Casso... | FunctionUnitBaseMulti which derives from ReservationSta... |
tree | commitdiff |
| 2021-12-01 |
Luke Kenneth Casso... | use m.submodules[name] instead of getattr |
tree | commitdiff |
| 2021-12-01 |
Luke Kenneth Casso... | add Regspecs get_io_spec function |
tree | commitdiff |
| 2021-11-30 |
Luke Kenneth Casso... | start allocating more FUs (more ReservationStations) |
tree | commitdiff |
| 2021-11-30 |
Tobias Platen | return correct data from microwatt |
tree | commitdiff |
| 2021-11-30 |
Tobias Platen | loadstore: add done_delay |
tree | commitdiff |
| 2021-11-25 |
Tobias Platen | remove unuses dsisr signal |
tree | commitdiff |
| 2021-11-25 |
Tobias Platen | reset state to idle on exception |
tree | commitdiff |
| 2021-11-19 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
| 2021-11-19 |
Luke Kenneth Casso... | create lists of latches in each FU, to record the read... |
tree | commitdiff |
| 2021-11-17 |
Jacob Lifshay | start adding bitmanip FU |
tree | commitdiff |
| 2021-11-16 |
Tobias Platen | loadstore1 now reports exception reason |
tree | commitdiff |
| 2021-11-15 |
Tobias Platen | report dar on exception + test case |
tree | commitdiff |
| 2021-11-10 |
Luke Kenneth Casso... | remove read of MSR, it is done by passing through Power... |
tree | commitdiff |
| 2021-11-10 |
Luke Kenneth Casso... | whitespace |
tree | commitdiff |
| 2021-11-10 |
Luke Kenneth Casso... | add fetch of MSR in LD/ST pipe_data |
tree | commitdiff |
| 2021-11-08 |
Tobias Platen | mmu unit test working again |
tree | commitdiff |
| 2021-11-08 |
Luke Kenneth Casso... | remove unneeded imports |
tree | commitdiff |
| 2021-11-07 |
Luke Kenneth Casso... | make FSMDivCoreStage properly conform to Stage API |
tree | commitdiff |
| 2021-11-07 |
Luke Kenneth Casso... | switch over to single-entry (num_rows=1) ReservationSta... |
tree | commitdiff |
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