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mmu fsm: symbols have been renamed
[soc.git] / src / soc / fu / mmu / fsm.py
2021-11-02 Tobias Platenmmu fsm: symbols have been renamed blob | commitdiff | raw
2021-11-01 Tobias Platenhack: resolve DriverConflict in src/soc/fu/mmu/fsm.py blob | commitdiff | raw | diff to current
2021-08-24 Luke Kenneth Casso... replace data_o with o_data and data_i with i_data as... blob | commitdiff | raw | diff to current
2021-08-24 Luke Kenneth Casso... big rename, global/search/replace of ready_o with o_rea... blob | commitdiff | raw | diff to current
2021-05-11 Luke Kenneth Casso... whoops names changed in MMU FSM blob | commitdiff | raw | diff to current
2021-05-09 Luke Kenneth Casso... add MMU bugtracker link blob | commitdiff | raw | diff to current
2021-05-09 Luke Kenneth Casso... preference is to create a temp variable for comb and... blob | commitdiff | raw | diff to current
2021-05-08 Luke Kenneth Casso... add bugreport link to mmu blob | commitdiff | raw | diff to current
2021-05-07 Tobias Platenfix 'sync' referenced before assignment in src/soc... blob | commitdiff | raw | diff to current
2021-05-07 Luke Kenneth Casso... update comments and docstrings blob | commitdiff | raw | diff to current
2021-05-07 Luke Kenneth Casso... whoops, import error blob | commitdiff | raw | diff to current
2021-05-07 Luke Kenneth Casso... move LoadStore1 class to soc.fu.ldst.loadstore blob | commitdiff | raw | diff to current
2021-05-07 Luke Kenneth Casso... move dsisr and dar into LoadStore1 blob | commitdiff | raw | diff to current
2021-05-05 Tobias Platenfix bug in mmu/fsm.py blob | commitdiff | raw | diff to current
2021-05-04 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... blob | commitdiff | raw | diff to current
2021-05-04 Tobias Platenimplement MFSPR the same way as fu/spr/main_stage.py blob | commitdiff | raw | diff to current
2021-05-04 Tobias Platenupate dsisr and dar using sync blob | commitdiff | raw | diff to current
2021-05-04 Luke Kenneth Casso... more rename of exception_o to exc_o, add convenience... blob | commitdiff | raw | diff to current
2021-05-04 Luke Kenneth Casso... comment out nc (nocache), it seems to actually work blob | commitdiff | raw | diff to current
2021-05-03 Luke Kenneth Casso... MMU: get store to activate only when data is available... blob | commitdiff | raw | diff to current
2021-05-03 Luke Kenneth Casso... disable the cache for now, whilst testing read/write... blob | commitdiff | raw | diff to current
2021-05-02 Luke Kenneth Casso... use Const to define bit-length when comparing top nibbl... blob | commitdiff | raw | diff to current
2021-05-02 Luke Kenneth Casso... mmu FSM store in dcache: only put data onto d_in on... blob | commitdiff | raw | diff to current
2021-05-02 Luke Kenneth Casso... return d_out.valid instead of always "ok" in MMU FSM blob | commitdiff | raw | diff to current
2021-05-02 Luke Kenneth Casso... HACK WARNING: disable d-cache on hard-coded address... blob | commitdiff | raw | diff to current
2021-05-01 Luke Kenneth Casso... store data in microwatt dcache goes in one cycle AFTER... blob | commitdiff | raw | diff to current
2021-05-01 Luke Kenneth Casso... only do dcache lookup for now blob | commitdiff | raw | diff to current
2021-04-30 Luke Kenneth Casso... comments on dcache-to-mmu link blob | commitdiff | raw | diff to current
2021-04-30 Luke Kenneth Casso... add a TestSRAM variant of LoadStore1, for being able... blob | commitdiff | raw | diff to current
2021-04-30 Luke Kenneth Casso... hook up dcache wb_in/out to PortInterfaceBase Wishbone... blob | commitdiff | raw | diff to current
2021-04-30 Luke Kenneth Casso... set up LoadStore1 in ConfigMemoryPortInterface and... blob | commitdiff | raw | diff to current
2021-04-29 Luke Kenneth Casso... comment out adding mmu and dcache to pspec in MMU FSM blob | commitdiff | raw | diff to current
2021-04-29 Luke Kenneth Casso... move dcache into Loadstore1 blob | commitdiff | raw | diff to current
2021-04-27 Luke Kenneth Casso... return read data out from Loadstore1 only when valid blob | commitdiff | raw | diff to current
2021-04-26 Luke Kenneth Casso... hook up MSR into MMU (TODO, use a lot less bits) blob | commitdiff | raw | diff to current
2021-04-23 Luke Kenneth Casso... move over to from openpower imports blob | commitdiff | raw | diff to current
2021-03-30 Alain D D WilliamsMerge branch 'master' of git.libre-soc.org:soc blob | commitdiff | raw | diff to current
2021-03-28 Luke Kenneth Casso... rather invasive reduction of SPR regfile size blob | commitdiff | raw | diff to current
2021-03-02 Luke Kenneth Casso... operating correctly, not directing MMU SPRs to SPR... blob | commitdiff | raw | diff to current
2021-03-02 Luke Kenneth Casso... must always set ok for writing out data otherwise it... blob | commitdiff | raw | diff to current
2021-02-18 Tobias Platenmmu: remove TestMemory blob | commitdiff | raw | diff to current
2021-02-16 Tobias Platenmmureq handling blob | commitdiff | raw | diff to current
2021-02-16 Tobias Platendcache error handling blob | commitdiff | raw | diff to current
2021-02-05 Tobias Platenfix hanging simulation blob | commitdiff | raw | diff to current
2021-02-04 Tobias Platensrc/soc/fu/mmu/fsm.py: add debug outputs for gtkwave blob | commitdiff | raw | diff to current
2021-01-19 Tobias Platenconnect LDSTException to MMU and DCache blob | commitdiff | raw | diff to current
2021-01-19 Tobias Platenconnect wishbone bus to test memory blob | commitdiff | raw | diff to current
2021-01-18 Tobias Platenfu/mmu/fsm.py: connect valid and load signals blob | commitdiff | raw | diff to current
2021-01-17 Tobias Platenadd test memory for simulation blob | commitdiff | raw | diff to current
2021-01-16 Tobias Platenclean up test case for tlbie and dcbz blob | commitdiff | raw | diff to current
2021-01-06 Tobias Platenfu/mmu/fsm.py: mfspr!=mtspr blob | commitdiff | raw | diff to current
2020-11-16 Tobias Platenadd class LoadStore1(PortInterfaceBase) blob | commitdiff | raw | diff to current
2020-11-07 Tobias Platenfixed a bug in src/soc/fu/mmu/fsm.py blob | commitdiff | raw | diff to current
2020-10-08 Tobias PlatenMerge branch 'master' of ssh://git.libre-riscv.org... blob | commitdiff | raw | diff to current
2020-10-08 Luke Kenneth Casso... add incoming PortInterface to be connected to LoadStore... blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... instantiate MMU from AllFunctionUnits blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... add edge-triggering to dcache/mmu "valid" blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... add OP_MFSPR to mmu blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... use convenience vars blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... add OP_TLBIE to mmu fsm blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... add OP_DCBZ to mmu fsm, needs RA to be added to MMU... blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... add MMU MTSPR connection into FSM blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... add in MMU and DCache into MMU FSM blob | commitdiff | raw | diff to current
2020-09-15 Luke Kenneth Casso... add mmu fsm blob | commitdiff | raw | diff to current