| 2021-12-23 |
Cesar Strauss | Re-enable core stopped signal when stopped. |
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| 2021-12-22 |
Luke Kenneth Casso... | fix issues with running core in DMI "stopped" status... |
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| 2021-12-22 |
Luke Kenneth Casso... | whoops, use MSR.IR for I-Cache fetch! |
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| 2021-12-21 |
Luke Kenneth Casso... | continue to assert PC in FetchFSM if needed |
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| 2021-12-21 |
Luke Kenneth Casso... | for each unit test case in test_issuer_mmu_data_path... |
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| 2021-12-19 |
Luke Kenneth Casso... | add hard stop address in ifetch unit test, bit of a... |
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| 2021-12-19 |
Luke Kenneth Casso... | set terminate if core terminate requested |
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| 2021-12-19 |
Luke Kenneth Casso... | add DMI STOPADDR register and use it in HDLRunner to... |
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| 2021-12-18 |
Luke Kenneth Casso... | sort out reset signalling after tracking down Simulatio... |
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| 2021-12-18 |
Luke Kenneth Casso... | add icache/dcache/mmu unit test for TestIssuer |
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| 2021-12-18 |
Luke Kenneth Casso... | get instructions to re-run in issuer after I-Cache... |
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| 2021-12-16 |
Luke Kenneth Casso... | whoops remove duplicate code (cut/paste error) no harm... |
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| 2021-12-15 |
Luke Kenneth Casso... | read MSR.PR and MSR.DR and update ICache priv/virt... |
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| 2021-12-15 |
Luke Kenneth Casso... | move update of pc, msr and svstate into TestIssuerBase |
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| 2021-12-15 |
Luke Kenneth Casso... | comment-out TestIssuerInternalInorder for now |
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| 2021-12-15 |
Luke Kenneth Casso... | move alternative TestIssuerInternalInOrder to new file |
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| 2021-12-15 |
Luke Kenneth Casso... | split out common elaboratable code from TestIssuer, |
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| 2021-12-15 |
Luke Kenneth Casso... | big split-out of common functions in TestIssuer to... |
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| 2021-12-15 |
Luke Kenneth Casso... | simplifying / tidyup of TestIssuer to get CoreState |
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| 2021-12-15 |
Luke Kenneth Casso... | sort out MSR, read/write in same way as PC/SVSTATE... |
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| 2021-12-15 |
Luke Kenneth Casso... | get fetch_failed working with no MMU |
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| 2021-12-14 |
Luke Kenneth Casso... | trying to get TestIssuer FSM to respond correctly to... |
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| 2021-12-13 |
Luke Kenneth Casso... | request a flush of icache to clear the instruction... |
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| 2021-12-12 |
Luke Kenneth Casso... | set and reset instruction fault so it does not occur... |
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| 2021-12-12 |
Luke Kenneth Casso... | when an exception happens, if it is a fetch_failed... |
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| 2021-12-12 |
Luke Kenneth Casso... | drat, a test inverting the instruction made it into... |
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| 2021-12-12 |
Luke Kenneth Casso... | starting to hack in fetch failed (including OP_FETCH_FA... |
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| 2021-12-12 |
Luke Kenneth Casso... | set fetch_failed into PowerDecoder2 combinatorially |
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| 2021-12-12 |
Luke Kenneth Casso... | in a terrible botched way, get at I-Cache and set it up |
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| 2021-12-09 |
Luke Kenneth Casso... | wire fetch_failed from I-Cache to PowerDecoder2 |
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| 2021-12-09 |
Jacob Lifshay | format code |
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| 2021-11-23 |
Luke Kenneth Casso... | more comments |
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| 2021-11-22 |
Luke Kenneth Casso... | make FetchFSM take PC as an input in its ispec |
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| 2021-11-22 |
Luke Kenneth Casso... | local variable rename in FetchFSM |
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| 2021-11-22 |
Luke Kenneth Casso... | split out FetchFSM into separate module |
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| 2021-11-21 |
Luke Kenneth Casso... | reset execute back to ISSUE_START if at INSN_WAIT and |
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| 2021-11-21 |
Luke Kenneth Casso... | complex. TestRunner now does not work properly unless... |
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| 2021-11-19 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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| 2021-11-18 |
Luke Kenneth Casso... | experimenting with overlapping instructions, bit of... |
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| 2021-11-10 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
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| 2021-11-10 |
Luke Kenneth Casso... | make core busy_o part of the CoreOutput data structure |
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| 2021-11-08 |
Luke Kenneth Casso... | remove unused variable |
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| 2021-11-08 |
Luke Kenneth Casso... | remove issue_i from core, use i_valid instead to decide... |
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| 2021-11-08 |
Luke Kenneth Casso... | move "exception happened" detection from TestIssuer... |
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| 2021-11-08 |
Luke Kenneth Casso... | use p.i_valid in core instead of explicit signal ivalid_i |
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| 2021-11-08 |
Luke Kenneth Casso... | use Pipeline API o_ready instead of explicit core busy_... |
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| 2021-11-08 |
Luke Kenneth Casso... | move simple core input and output data to in/out data... |
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| 2021-09-25 |
Las Safin | Merge remote-tracking branch 'upstream/master' into pr |
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| 2021-09-10 |
Luke Kenneth Casso... | update explanatory comments on LD/ST exception handling |
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| 2021-09-08 |
Cesar Strauss | Monitor exceptions, re-decoding the instruction in... |
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| 2021-08-29 |
Luke Kenneth Casso... | unnecessary signal rename ivalid_i to ii_valid (reverting) |
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| 2021-08-24 |
Luke Kenneth Casso... | replace data_o with o_data and data_i with i_data as... |
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| 2021-08-24 |
Luke Kenneth Casso... | big rename, global/search/replace of ready_o with o_rea... |
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| 2021-07-14 |
Luke Kenneth Casso... | update SVSTATE to 64 bit length (fortunately very easy) |
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| 2021-07-12 |
Luke Kenneth Casso... | use default decoder, do not pass one in. |
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| 2021-06-24 |
Luke Kenneth Casso... | propagate new use_svp64_ldst_dec mode through TestCore... |
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| 2021-06-24 |
Luke Kenneth Casso... | add an explicit PowerDecoder.is_svp64_mode flag to... |
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| 2021-06-09 |
Luke Kenneth Casso... | disconnect pll clock, connected in peripheral interconnect |
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| 2021-06-09 |
Luke Kenneth Casso... | add in/out of ref_clk and pllclk_clk when PLL enabled |
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| 2021-06-03 |
Luke Kenneth Casso... | comment out domains that have already been created |
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| 2021-06-03 |
Luke Kenneth Casso... | no, do not assign clock to clock! |
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| 2021-06-03 |
Luke Kenneth Casso... | sort out PLL domains but bypass PLL due to lack of... |
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| 2021-06-03 |
Luke Kenneth Casso... | use DomainRenamer on all sub-components of TestIssuer |
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| 2021-06-03 |
Luke Kenneth Casso... | make core_rst a member of TestIssuerInternal |
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| 2021-05-27 |
Luke Kenneth Casso... | adjust PLL connections looking for coriolis2 issue |
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| 2021-05-26 |
Luke Kenneth Casso... | arse. PLL test_issuer clk_sel_i accidentally only 1... |
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| 2021-05-26 |
Luke Kenneth Casso... | remove err feature from sram4k wb |
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| 2021-05-26 |
Luke Kenneth Casso... | rename PLL signals |
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| 2021-05-24 |
Luke Kenneth Casso... | match up PLL names |
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| 2021-05-22 |
Luke Kenneth Casso... | update PLL to use Instance |
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| 2021-05-13 |
Luke Kenneth Casso... | update comments in issuer.py regarding a 4th FSM |
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| 2021-05-09 |
Luke Kenneth Casso... | add comment about LD/ST exception needs copying into... |
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| 2021-05-07 |
Luke Kenneth Casso... | whoops setup of core.sv_pred_sm/dm not indented and... |
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| 2021-05-06 |
Luke Kenneth Casso... | pass relevant predicate mask bits through to Decoders... |
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| 2021-05-06 |
Luke Kenneth Casso... | add in predicate mask bit detection when zeroing is... |
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| 2021-05-06 |
Luke Kenneth Casso... | pass SVP64 ReMap field through to core and then on... |
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| 2021-05-05 |
Luke Kenneth Casso... | whoops wrong signal name, set exc_happened |
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| 2021-05-04 |
Luke Kenneth Casso... | add TODO comments and cross-reference to bug |
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| 2021-05-04 |
Luke Kenneth Casso... | note a way to see if an exception happened, in TestIssuer |
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| 2021-04-30 |
Luke Kenneth Casso... | set up LoadStore1 in ConfigMemoryPortInterface and... |
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| 2021-04-25 |
Cesar Strauss | Shift-out skipped mask bits for both crpred and intpred |
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| 2021-04-24 |
Luke Kenneth Casso... | whitespace |
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| 2021-04-23 |
Luke Kenneth Casso... | more openpower-isa conversion |
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| 2021-04-23 |
Luke Kenneth Casso... | move over to from openpower imports |
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| 2021-04-22 |
Cesar Strauss | Implement CR predication |
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| 2021-04-21 |
Cesar Strauss | CR sub-fields are stored in MSB0 order |
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| 2021-04-21 |
Cesar Strauss | Fix sense of "invert" signal |
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| 2021-04-18 |
Luke Kenneth Casso... | create signal on test_issuer which gives PLL clk_sel_i... |
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| 2021-04-18 |
Luke Kenneth Casso... | rename PLL pins to match LIP6.fr PLL |
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| 2021-04-18 |
Luke Kenneth Casso... | core_stopped_i unused: remove |
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| 2021-04-17 |
Cesar Strauss | Implement 1<<r3 directly by a shift |
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| 2021-04-10 |
Cesar Strauss | Implement 1<<r3 predicate mode |
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| 2021-04-09 |
Luke Kenneth Casso... | test firmware upload program needed to branch back... |
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| 2021-04-08 |
Luke Kenneth Casso... | sort out pc reset when DMI interface requests reset |
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| 2021-04-06 |
Cesar Strauss | Make the VL loop reentrant in HDL |
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| 2021-04-03 |
Cesar Strauss | Reminder for a possible hardware optimization |
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| 2021-04-03 |
Cesar Strauss | Be more precise when using a one-bit constant |
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| 2021-04-03 |
Cesar Strauss | Signal the simulator when completing a VL loop |
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| 2021-04-01 |
Luke Kenneth Casso... | TWI enabled in JTAG boundary scan |
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| 2021-04-01 |
Luke Kenneth Casso... | reduce subset of functions to be created in JTAG bounda... |
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