2020-09-26 |
Luke Kenneth Casso... | DMI-to-JTAG needed to be "sync" to get ack/resp right |
tree | commitdiff |
2020-09-26 |
Cesar Strauss | Convert a few more tests to be able to use cxxsim |
tree | commitdiff |
2020-09-24 |
Cesar Strauss | Use nmutil simulator module to simplify choosing among... |
tree | commitdiff |
2020-09-22 |
Luke Kenneth Casso... | move dmi_sim to separate module |
tree | commitdiff |
2020-09-22 |
Luke Kenneth Casso... | add jtagremote to litex sim, add new "variant" to core... |
tree | commitdiff |
2020-09-22 |
Luke Kenneth Casso... | add jtag interface to issuer_verilog |
tree | commitdiff |
2020-09-22 |
Luke Kenneth Casso... | add MMU (commented out) |
tree | commitdiff |
2020-09-19 |
Luke Kenneth Casso... | remove the gpio peripheral which was previously hard... |
tree | commitdiff |
2020-09-08 |
Luke Kenneth Casso... | create a special subset of Decoder Record for storing... |
tree | commitdiff |
2020-09-08 |
Luke Kenneth Casso... | pass in state into PowerDecode2, save on eqs and wires |
tree | commitdiff |
2020-09-08 |
Luke Kenneth Casso... | give Decode2Execute1Type in core a name |
tree | commitdiff |
2020-09-08 |
Luke Kenneth Casso... | pass in CoreState to PowerDecoder rather than eq a... |
tree | commitdiff |
2020-09-08 |
Luke Kenneth Casso... | add cxxsim option |
tree | commitdiff |
2020-09-07 |
Luke Kenneth Casso... | use PowerDecoderSubsets for FUs, except for TRAP which... |
tree | commitdiff |
2020-09-07 |
Luke Kenneth Casso... | add per-FU PowerDecoders. should now be subsettable |
tree | commitdiff |
2020-09-06 |
Luke Kenneth Casso... | copy dec SPR into decoder cur_state |
tree | commitdiff |
2020-09-06 |
Luke Kenneth Casso... | wark-wark, fast regs is binary-addressed |
tree | commitdiff |
2020-09-06 |
Luke Kenneth Casso... | add comments for DEC / TB |
tree | commitdiff |
2020-09-06 |
Luke Kenneth Casso... | add a DEC/TB FSM to TestIssuer |
tree | commitdiff |
2020-09-05 |
Luke Kenneth Casso... | add comments on MSR read |
tree | commitdiff |
2020-09-05 |
Luke Kenneth Casso... | move GPIO IRQ to 15 to match microwatt modifications |
tree | commitdiff |
2020-09-05 |
Luke Kenneth Casso... | MSR read in INSN_READ only occurs for 1 cycle |
tree | commitdiff |
2020-09-05 |
Luke Kenneth Casso... | sync on ICP eint |
tree | commitdiff |
2020-09-05 |
Luke Kenneth Casso... | connect XICS core irq to Decode2 eint |
tree | commitdiff |
2020-09-05 |
Luke Kenneth Casso... | add simple GPIO wishbone bus to litex sim.py |
tree | commitdiff |
2020-09-05 |
Luke Kenneth Casso... | add simple GPIO peripheral to verilog TestIssuer |
tree | commitdiff |
2020-09-04 |
Luke Kenneth Casso... | bring out XICS ICS interrupt levels so that they can... |
tree | commitdiff |
2020-09-04 |
Luke Kenneth Casso... | adding option to include XICS external interrupts. |
tree | commitdiff |
2020-08-30 |
Luke Kenneth Casso... | reversal of FXM mask for one-hot selection in OP_MTCR... |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | add XER read via DMI interface to sim.py |
tree | commitdiff |
2020-08-29 |
Luke Kenneth Casso... | add hack to get at XER through DMI interface |
tree | commitdiff |
2020-08-27 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-27 |
Luke Kenneth Casso... | overflow-enable does not occur on shift operations |
tree | commitdiff |
2020-08-25 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-25 |
Luke Kenneth Casso... | add CR read to DMI interface |
tree | commitdiff |
2020-08-24 |
Luke Kenneth Casso... | add isel CR tests to run on qemu (confirmed working) |
tree | commitdiff |
2020-08-24 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-23 |
Luke Kenneth Casso... | bring "core stopped" signal out through DMI interface |
tree | commitdiff |
2020-08-21 |
Luke Kenneth Casso... | testing 64-bit wishbone bus after 32-bit *still* fails... |
tree | commitdiff |
2020-08-21 |
Luke Kenneth Casso... | get litex sim enabled with 32-bit wishbone bus |
tree | commitdiff |
2020-08-16 |
Luke Kenneth Casso... | attempting to track down bug in litex bios memtest |
tree | commitdiff |
2020-08-16 |
Luke Kenneth Casso... | read delay on getting regfile data |
tree | commitdiff |
2020-08-15 |
Luke Kenneth Casso... | rather big change to interaction between regfile and... |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | ha! "state" (pc, msr) not properly passed to core |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | drop in insn_state synchronously in issuer, at same... |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | finally, fix decoder combinatorial loop |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | sync up the core decode-execute state, |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | move instruction decoder out of core |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | move regspec / rdflag decoding functions out of PowerDe... |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | sort out instruction stop/cancel when adding a new... |
tree | commitdiff |
2020-08-14 |
Luke Kenneth Casso... | put multi-ports back (for read) on int and fast regfiles |
tree | commitdiff |
2020-08-13 |
Luke Kenneth Casso... | fix dmi reg read |
tree | commitdiff |
2020-08-13 |
Luke Kenneth Casso... | sync on pc writing when changed |
tree | commitdiff |
2020-08-13 |
Luke Kenneth Casso... | sync on read of regfile ports |
tree | commitdiff |
2020-08-13 |
Luke Kenneth Casso... | sigh. convert INT regfile to binary addressing |
tree | commitdiff |
2020-08-11 |
Luke Kenneth Casso... | sigh, remove yet another int regfile read port |
tree | commitdiff |
2020-08-11 |
Luke Kenneth Casso... | massive reduction in gate count by using alternative... |
tree | commitdiff |
2020-08-11 |
Luke Kenneth Casso... | reduce regfile port usage for INT and FAST |
tree | commitdiff |
2020-08-11 |
Luke Kenneth Casso... | prepare write ports to be shared |
tree | commitdiff |
2020-08-11 |
Luke Kenneth Casso... | move write regfile picker creation to new function |
tree | commitdiff |
2020-08-11 |
Luke Kenneth Casso... | reduce regfile ports by creating separate STATE regfile |
tree | commitdiff |
2020-08-11 |
Luke Kenneth Casso... | reducing regfile port usage by sharing read ports |
tree | commitdiff |
2020-08-10 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-09 |
Luke Kenneth Casso... | write pulse in issuer |
tree | commitdiff |
2020-08-09 |
Luke Kenneth Casso... | fix combinatorial loop in ldst compunit |
tree | commitdiff |
2020-08-09 |
Luke Kenneth Casso... | use rising edge detection on st go_i/rel_o |
tree | commitdiff |
2020-08-09 |
Luke Kenneth Casso... | add logical test issuer case |
tree | commitdiff |
2020-08-09 |
Luke Kenneth Casso... | get rid of MSR read combinatorial loop |
tree | commitdiff |
2020-08-09 |
Luke Kenneth Casso... | delay go_st by one cycle, break combinatorial loop |
tree | commitdiff |
2020-08-05 |
Cole Poirier | Merge branch 'master' of git.libre-soc.org:soc |
tree | commitdiff |
2020-08-05 |
Luke Kenneth Casso... | add div test cases into test_issuer.py |
tree | commitdiff |
2020-08-05 |
Luke Kenneth Casso... | add div FSM as default for test_issuer in verilog and... |
tree | commitdiff |
2020-08-04 |
Luke Kenneth Casso... | read/set pc outside of FSM so that DMI interface can... |
tree | commitdiff |
2020-08-04 |
Luke Kenneth Casso... | whoops must output NIA not PC to debug DMI query in... |
tree | commitdiff |
2020-08-04 |
Luke Kenneth Casso... | allow instruction to run if initiated whilst "stopped... |
tree | commitdiff |
2020-08-04 |
Luke Kenneth Casso... | add DMI debug interface to libresoc litex sim |
tree | commitdiff |
2020-08-03 |
Luke Kenneth Casso... | add quick demo/test of reading DMI reg 9 |
tree | commitdiff |
2020-08-03 |
Luke Kenneth Casso... | pass state (MSR/PC) around between PowerDecode2, DMI... |
tree | commitdiff |
2020-08-03 |
Luke Kenneth Casso... | use new soc.config.state CoreState class in DMI and... |
tree | commitdiff |
2020-08-03 |
Tobias Platen | Merge branch 'master' of ssh://git.libre-riscv.org... |
tree | commitdiff |
2020-08-03 |
Luke Kenneth Casso... | change over to DMI debug start/stop interface |
tree | commitdiff |
2020-07-31 |
Luke Kenneth Casso... | restrict external port list further in test_issuer |
tree | commitdiff |
2020-07-30 |
Luke Kenneth Casso... | core_start/stop/endian were inverted (output) |
tree | commitdiff |
2020-07-30 |
Luke Kenneth Casso... | ha! have to explicitly specify the ports when writing... |
tree | commitdiff |
2020-07-29 |
Luke Kenneth Casso... | bit of a big change: add prefixes "cu_" to all CompUnit... |
tree | commitdiff |
2020-07-29 |
Jacob Lifshay | add __init__.py to all source directories |
tree | commitdiff |
2020-07-29 |
Jacob Lifshay | format some tests |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | add nop test cases |
tree | commitdiff |
2020-07-26 |
Luke Kenneth Casso... | activate some of new accumulator-based tests in test_issuer |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | support 32-bit mem width setting |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | allow imem to be 64/32 bit wide |
tree | commitdiff |
2020-07-23 |
Luke Kenneth Casso... | begin core in running state |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | Merge remote-tracking branch 'origin/master' |
tree | commitdiff |
2020-07-22 |
Jacob Lifshay | format code |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | missing ports from issuer, when doing verilog |
tree | commitdiff |
2020-07-22 |
Luke Kenneth Casso... | reduce number of FastRegs read ports |
tree | commitdiff |
2020-07-21 |
Luke Kenneth Casso... | add PC (CIA) to PowerDecode2 "state" for passing into... |
tree | commitdiff |
2020-07-19 |
Luke Kenneth Casso... | do not start core in terminated mode |
tree | commitdiff |
2020-07-19 |
Luke Kenneth Casso... | explicitly set up a pc_i_ok signal in test_microwatt.py |
tree | commitdiff |
2020-07-19 |
Luke Kenneth Casso... | expose core_stop_i to outside as well |
tree | commitdiff |
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